System and methods for connecting multiple functional components
The present invention relates to a flexible and reconfigurable bus fabric for microelectronic processing units, which can offer efficient memory data management, together with efficient data transfer and relieving data transfer congestion in an integrated circuit. In an embodiment, the present recon...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | MITRA HIRAK KULKARNI RAJ WICKS RICHARD MOON MICHAEL |
description | The present invention relates to a flexible and reconfigurable bus fabric for microelectronic processing units, which can offer efficient memory data management, together with efficient data transfer and relieving data transfer congestion in an integrated circuit. In an embodiment, the present reconfigurable bus fabric comprises a multistate intersection between two data buses. Preferably, the multistate intersection comprises at least two states, a connecting state connecting the two data buses, and a disconnecting state disconnecting the two data buses. The multistate intersection provides a reconfigurable bus fabric, allowing different connection configuration for the data buses. This reconfigurable bus fabric offers soft-configurability and soft-reconfigurability, using software programming to arrange the circuits' interconnections. Other configurations are also disclosed in exemplary embodiments. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7822897B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7822897B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7822897B23</originalsourceid><addsrcrecordid>eNrjZHAIriwuSc1VSMxLUchNLcnITylWSMsvUkjOz8tLTS7JzEtXyC3NKcksyElVSCvNA4rk5yXmAKVzC_LzUvNKinkYWNMSc4pTeaE0N4OCm2uIs4duakF-fGpxQWJyal5qSXxosLmFkZGFpbmTkTERSgC-pTHv</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>System and methods for connecting multiple functional components</title><source>esp@cenet</source><creator>MITRA HIRAK ; KULKARNI RAJ ; WICKS RICHARD ; MOON MICHAEL</creator><creatorcontrib>MITRA HIRAK ; KULKARNI RAJ ; WICKS RICHARD ; MOON MICHAEL</creatorcontrib><description>The present invention relates to a flexible and reconfigurable bus fabric for microelectronic processing units, which can offer efficient memory data management, together with efficient data transfer and relieving data transfer congestion in an integrated circuit. In an embodiment, the present reconfigurable bus fabric comprises a multistate intersection between two data buses. Preferably, the multistate intersection comprises at least two states, a connecting state connecting the two data buses, and a disconnecting state disconnecting the two data buses. The multistate intersection provides a reconfigurable bus fabric, allowing different connection configuration for the data buses. This reconfigurable bus fabric offers soft-configurability and soft-reconfigurability, using software programming to arrange the circuits' interconnections. Other configurations are also disclosed in exemplary embodiments.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2010</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20101026&DB=EPODOC&CC=US&NR=7822897B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20101026&DB=EPODOC&CC=US&NR=7822897B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MITRA HIRAK</creatorcontrib><creatorcontrib>KULKARNI RAJ</creatorcontrib><creatorcontrib>WICKS RICHARD</creatorcontrib><creatorcontrib>MOON MICHAEL</creatorcontrib><title>System and methods for connecting multiple functional components</title><description>The present invention relates to a flexible and reconfigurable bus fabric for microelectronic processing units, which can offer efficient memory data management, together with efficient data transfer and relieving data transfer congestion in an integrated circuit. In an embodiment, the present reconfigurable bus fabric comprises a multistate intersection between two data buses. Preferably, the multistate intersection comprises at least two states, a connecting state connecting the two data buses, and a disconnecting state disconnecting the two data buses. The multistate intersection provides a reconfigurable bus fabric, allowing different connection configuration for the data buses. This reconfigurable bus fabric offers soft-configurability and soft-reconfigurability, using software programming to arrange the circuits' interconnections. Other configurations are also disclosed in exemplary embodiments.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2010</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHAIriwuSc1VSMxLUchNLcnITylWSMsvUkjOz8tLTS7JzEtXyC3NKcksyElVSCvNA4rk5yXmAKVzC_LzUvNKinkYWNMSc4pTeaE0N4OCm2uIs4duakF-fGpxQWJyal5qSXxosLmFkZGFpbmTkTERSgC-pTHv</recordid><startdate>20101026</startdate><enddate>20101026</enddate><creator>MITRA HIRAK</creator><creator>KULKARNI RAJ</creator><creator>WICKS RICHARD</creator><creator>MOON MICHAEL</creator><scope>EVB</scope></search><sort><creationdate>20101026</creationdate><title>System and methods for connecting multiple functional components</title><author>MITRA HIRAK ; KULKARNI RAJ ; WICKS RICHARD ; MOON MICHAEL</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7822897B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2010</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>MITRA HIRAK</creatorcontrib><creatorcontrib>KULKARNI RAJ</creatorcontrib><creatorcontrib>WICKS RICHARD</creatorcontrib><creatorcontrib>MOON MICHAEL</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MITRA HIRAK</au><au>KULKARNI RAJ</au><au>WICKS RICHARD</au><au>MOON MICHAEL</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>System and methods for connecting multiple functional components</title><date>2010-10-26</date><risdate>2010</risdate><abstract>The present invention relates to a flexible and reconfigurable bus fabric for microelectronic processing units, which can offer efficient memory data management, together with efficient data transfer and relieving data transfer congestion in an integrated circuit. In an embodiment, the present reconfigurable bus fabric comprises a multistate intersection between two data buses. Preferably, the multistate intersection comprises at least two states, a connecting state connecting the two data buses, and a disconnecting state disconnecting the two data buses. The multistate intersection provides a reconfigurable bus fabric, allowing different connection configuration for the data buses. This reconfigurable bus fabric offers soft-configurability and soft-reconfigurability, using software programming to arrange the circuits' interconnections. Other configurations are also disclosed in exemplary embodiments.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US7822897B2 |
source | esp@cenet |
subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | System and methods for connecting multiple functional components |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-16T20%3A51%3A56IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MITRA%20HIRAK&rft.date=2010-10-26&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS7822897B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |