Architecture of function blocks and wirings in a structured ASIC and configurable driver cell of a logic cell zone

An integrated semiconductor circuit has a regular array of logic function blocks (L) and a regular array of wiring zones (X) corresponding thereto. The wiring lines in at least one wiring layer of a wiring zone (X) are realized as line segments that are continuous within the wiring zone and are inte...

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Hauptverfasser: SCHEPPLER MICHAEL, KOEPPE SIEGMAR, GLIESE JOERG, KAMP WINFRIED
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:An integrated semiconductor circuit has a regular array of logic function blocks (L) and a regular array of wiring zones (X) corresponding thereto. The wiring lines in at least one wiring layer of a wiring zone (X) are realized as line segments that are continuous within the wiring zone and are interrupted at zone boundaries. Furthermore, the semiconductor circuit comprises driver cells that surround a logic cell of the logic function block in an L-shaped manner.