Method and system for analyzing an integrated circuit based on sample windows selected using an open deterministic sequencing technique
Disclosed herein are embodiments of a system and an associated method for analyzing an integrated circuit to determine the value of a particular attribute (i.e., a physical or electrical property) in that integrated circuit. In the embodiments, an open deterministic sequencing technique is used to s...
Gespeichert in:
| Hauptverfasser: | , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | BRAASCH SARAH C HIBBELER JASON D PAPADOPOULOU EVANTHIA KANJ ROUWAIDA N NASSIF SANI R MAYNARD DANIEL N |
| description | Disclosed herein are embodiments of a system and an associated method for analyzing an integrated circuit to determine the value of a particular attribute (i.e., a physical or electrical property) in that integrated circuit. In the embodiments, an open deterministic sequencing technique is used to select a sequence of points representing centers of sample windows in an integrated circuit layout. Then, the value of the particular attribute is determined for each sample window and the results are accumulated in order to infer an overall value for that particular attribute for the entire integrated circuit layout. This sequencing technique has the advantage of allowing additional sample windows to be added and/or the sizes and shapes of the windows to be varied without hindering the quality of the sample. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7752580B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7752580B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7752580B23</originalsourceid><addsrcrecordid>eNqNy0EKwkAMheFuXIh6h1xAEEV0rShuXKlrGWdebWCaqU2K6AW8tiP0AK7yfvgyLD5HWJUCOQmkLzXUVKY2p4uvN8s9L2Ix3FtnCOS59R0b3ZzmSkLq6iaCniwhPZUUEf4HO-2fUwOhAENbs7Aa-4weHcT_gMFXwjnHxaB0UTHp76ig_e68PUzRpCu0cR4Cu15Oq9VyvlzPNvPFH-QLRVpMfw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method and system for analyzing an integrated circuit based on sample windows selected using an open deterministic sequencing technique</title><source>esp@cenet</source><creator>BRAASCH SARAH C ; HIBBELER JASON D ; PAPADOPOULOU EVANTHIA ; KANJ ROUWAIDA N ; NASSIF SANI R ; MAYNARD DANIEL N</creator><creatorcontrib>BRAASCH SARAH C ; HIBBELER JASON D ; PAPADOPOULOU EVANTHIA ; KANJ ROUWAIDA N ; NASSIF SANI R ; MAYNARD DANIEL N</creatorcontrib><description>Disclosed herein are embodiments of a system and an associated method for analyzing an integrated circuit to determine the value of a particular attribute (i.e., a physical or electrical property) in that integrated circuit. In the embodiments, an open deterministic sequencing technique is used to select a sequence of points representing centers of sample windows in an integrated circuit layout. Then, the value of the particular attribute is determined for each sample window and the results are accumulated in order to infer an overall value for that particular attribute for the entire integrated circuit layout. This sequencing technique has the advantage of allowing additional sample windows to be added and/or the sizes and shapes of the windows to be varied without hindering the quality of the sample.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2010</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20100706&DB=EPODOC&CC=US&NR=7752580B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20100706&DB=EPODOC&CC=US&NR=7752580B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BRAASCH SARAH C</creatorcontrib><creatorcontrib>HIBBELER JASON D</creatorcontrib><creatorcontrib>PAPADOPOULOU EVANTHIA</creatorcontrib><creatorcontrib>KANJ ROUWAIDA N</creatorcontrib><creatorcontrib>NASSIF SANI R</creatorcontrib><creatorcontrib>MAYNARD DANIEL N</creatorcontrib><title>Method and system for analyzing an integrated circuit based on sample windows selected using an open deterministic sequencing technique</title><description>Disclosed herein are embodiments of a system and an associated method for analyzing an integrated circuit to determine the value of a particular attribute (i.e., a physical or electrical property) in that integrated circuit. In the embodiments, an open deterministic sequencing technique is used to select a sequence of points representing centers of sample windows in an integrated circuit layout. Then, the value of the particular attribute is determined for each sample window and the results are accumulated in order to infer an overall value for that particular attribute for the entire integrated circuit layout. This sequencing technique has the advantage of allowing additional sample windows to be added and/or the sizes and shapes of the windows to be varied without hindering the quality of the sample.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2010</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNy0EKwkAMheFuXIh6h1xAEEV0rShuXKlrGWdebWCaqU2K6AW8tiP0AK7yfvgyLD5HWJUCOQmkLzXUVKY2p4uvN8s9L2Ix3FtnCOS59R0b3ZzmSkLq6iaCniwhPZUUEf4HO-2fUwOhAENbs7Aa-4weHcT_gMFXwjnHxaB0UTHp76ig_e68PUzRpCu0cR4Cu15Oq9VyvlzPNvPFH-QLRVpMfw</recordid><startdate>20100706</startdate><enddate>20100706</enddate><creator>BRAASCH SARAH C</creator><creator>HIBBELER JASON D</creator><creator>PAPADOPOULOU EVANTHIA</creator><creator>KANJ ROUWAIDA N</creator><creator>NASSIF SANI R</creator><creator>MAYNARD DANIEL N</creator><scope>EVB</scope></search><sort><creationdate>20100706</creationdate><title>Method and system for analyzing an integrated circuit based on sample windows selected using an open deterministic sequencing technique</title><author>BRAASCH SARAH C ; HIBBELER JASON D ; PAPADOPOULOU EVANTHIA ; KANJ ROUWAIDA N ; NASSIF SANI R ; MAYNARD DANIEL N</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7752580B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2010</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>BRAASCH SARAH C</creatorcontrib><creatorcontrib>HIBBELER JASON D</creatorcontrib><creatorcontrib>PAPADOPOULOU EVANTHIA</creatorcontrib><creatorcontrib>KANJ ROUWAIDA N</creatorcontrib><creatorcontrib>NASSIF SANI R</creatorcontrib><creatorcontrib>MAYNARD DANIEL N</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BRAASCH SARAH C</au><au>HIBBELER JASON D</au><au>PAPADOPOULOU EVANTHIA</au><au>KANJ ROUWAIDA N</au><au>NASSIF SANI R</au><au>MAYNARD DANIEL N</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method and system for analyzing an integrated circuit based on sample windows selected using an open deterministic sequencing technique</title><date>2010-07-06</date><risdate>2010</risdate><abstract>Disclosed herein are embodiments of a system and an associated method for analyzing an integrated circuit to determine the value of a particular attribute (i.e., a physical or electrical property) in that integrated circuit. In the embodiments, an open deterministic sequencing technique is used to select a sequence of points representing centers of sample windows in an integrated circuit layout. Then, the value of the particular attribute is determined for each sample window and the results are accumulated in order to infer an overall value for that particular attribute for the entire integrated circuit layout. This sequencing technique has the advantage of allowing additional sample windows to be added and/or the sizes and shapes of the windows to be varied without hindering the quality of the sample.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US7752580B2 |
| source | esp@cenet |
| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Method and system for analyzing an integrated circuit based on sample windows selected using an open deterministic sequencing technique |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-02T16%3A10%3A12IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=BRAASCH%20SARAH%20C&rft.date=2010-07-06&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS7752580B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |