Asynchronously-accessible memory device with mode selection circuitry for burst or pipelined operation

An integrated circuit memory device is designed for high speed data access and for compatibility with existing memory systems. An address strobe signal is used to latch a first address. During a burst access cycle the address is incremented internal to the device with additional address strobe trans...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	WILLIAMS BRETT L, RYAN KEVIN J, MAILLOUX JEFFREY S, MERRITT TODD A
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
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