Convolutional interleaving and de-interleaving circuit and method thereof

A convolutional interleaving and de-interleaving circuit and the method thereof are provided. The convolutional interleaving and de-interleaving circuit includes an initial address generator, a first address generator, a second address generator, an address mixer, an adder, a controller and a memory...

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1. Verfasser:	LIN CHIAUN
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRICITY
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creator	LIN CHIAUN
description	A convolutional interleaving and de-interleaving circuit and the method thereof are provided. The convolutional interleaving and de-interleaving circuit includes an initial address generator, a first address generator, a second address generator, an address mixer, an adder, a controller and a memory. Wherein, the controller enables those address generators to provide or store corresponding channel addresses. Further, an adder is shared and memory addresses are appropriately arranged so as to reduce the requirement of registers. Accordingly, the required gate count and the chip layout area can be reduced.
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The convolutional interleaving and de-interleaving circuit includes an initial address generator, a first address generator, a second address generator, an address mixer, an adder, a controller and a memory. Wherein, the controller enables those address generators to provide or store corresponding channel addresses. Further, an adder is shared and memory addresses are appropriately arranged so as to reduce the requirement of registers. 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The convolutional interleaving and de-interleaving circuit includes an initial address generator, a first address generator, a second address generator, an address mixer, an adder, a controller and a memory. Wherein, the controller enables those address generators to provide or store corresponding channel addresses. Further, an adder is shared and memory addresses are appropriately arranged so as to reduce the requirement of registers. Accordingly, the required gate count and the chip layout area can be reduced.</abstract><oa>free_for_read</oa></addata></record>
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subjects	BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRICITY
title	Convolutional interleaving and de-interleaving circuit and method thereof
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