Sense amplifier with leakage testing and read debug capability

Disclosed is a high speed and power efficient dual mode sense amplifier circuit, which comprises a configuration selector further comprising a read amplifier, a debug circuit and a backup read circuit. The dual mode sense amplifier circuit also comprises a controllable input node further comprising...

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Hauptverfasser: HIROSE RYAN TASUO, SRINIVASA RAGHAVAN VIJAY KUMAR
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creator HIROSE RYAN TASUO
SRINIVASA RAGHAVAN VIJAY KUMAR
description Disclosed is a high speed and power efficient dual mode sense amplifier circuit, which comprises a configuration selector further comprising a read amplifier, a debug circuit and a backup read circuit. The dual mode sense amplifier circuit also comprises a controllable input node further comprising an enabling circuit, the controllable input node being coupled to the configuration selector and the dual mode sense amplifier circuit comprises a differential signal generator further comprising a reference signal source, the differential signal generator is coupled to the controllable input node. A method of dual mode sensing and other embodiments are also disclosed.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7545694B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7545694B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7545694B23</originalsourceid><addsrcrecordid>eNrjZLALTs0rTlVIzC3IyUzLTC1SKM8syVDISU3MTkxPVShJLS7JzEtXSMxLUShKTUxRSElNKk1XSE4sSEzKzMksqeRhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhweamJqZmliZORsZEKAEA6vEwOg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Sense amplifier with leakage testing and read debug capability</title><source>esp@cenet</source><creator>HIROSE RYAN TASUO ; SRINIVASA RAGHAVAN VIJAY KUMAR</creator><creatorcontrib>HIROSE RYAN TASUO ; SRINIVASA RAGHAVAN VIJAY KUMAR</creatorcontrib><description>Disclosed is a high speed and power efficient dual mode sense amplifier circuit, which comprises a configuration selector further comprising a read amplifier, a debug circuit and a backup read circuit. The dual mode sense amplifier circuit also comprises a controllable input node further comprising an enabling circuit, the controllable input node being coupled to the configuration selector and the dual mode sense amplifier circuit comprises a differential signal generator further comprising a reference signal source, the differential signal generator is coupled to the controllable input node. A method of dual mode sensing and other embodiments are also disclosed.</description><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20090609&amp;DB=EPODOC&amp;CC=US&amp;NR=7545694B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20090609&amp;DB=EPODOC&amp;CC=US&amp;NR=7545694B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HIROSE RYAN TASUO</creatorcontrib><creatorcontrib>SRINIVASA RAGHAVAN VIJAY KUMAR</creatorcontrib><title>Sense amplifier with leakage testing and read debug capability</title><description>Disclosed is a high speed and power efficient dual mode sense amplifier circuit, which comprises a configuration selector further comprising a read amplifier, a debug circuit and a backup read circuit. The dual mode sense amplifier circuit also comprises a controllable input node further comprising an enabling circuit, the controllable input node being coupled to the configuration selector and the dual mode sense amplifier circuit comprises a differential signal generator further comprising a reference signal source, the differential signal generator is coupled to the controllable input node. A method of dual mode sensing and other embodiments are also disclosed.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLALTs0rTlVIzC3IyUzLTC1SKM8syVDISU3MTkxPVShJLS7JzEtXSMxLUShKTUxRSElNKk1XSE4sSEzKzMksqeRhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhweamJqZmliZORsZEKAEA6vEwOg</recordid><startdate>20090609</startdate><enddate>20090609</enddate><creator>HIROSE RYAN TASUO</creator><creator>SRINIVASA RAGHAVAN VIJAY KUMAR</creator><scope>EVB</scope></search><sort><creationdate>20090609</creationdate><title>Sense amplifier with leakage testing and read debug capability</title><author>HIROSE RYAN TASUO ; SRINIVASA RAGHAVAN VIJAY KUMAR</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7545694B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>HIROSE RYAN TASUO</creatorcontrib><creatorcontrib>SRINIVASA RAGHAVAN VIJAY KUMAR</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HIROSE RYAN TASUO</au><au>SRINIVASA RAGHAVAN VIJAY KUMAR</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Sense amplifier with leakage testing and read debug capability</title><date>2009-06-09</date><risdate>2009</risdate><abstract>Disclosed is a high speed and power efficient dual mode sense amplifier circuit, which comprises a configuration selector further comprising a read amplifier, a debug circuit and a backup read circuit. The dual mode sense amplifier circuit also comprises a controllable input node further comprising an enabling circuit, the controllable input node being coupled to the configuration selector and the dual mode sense amplifier circuit comprises a differential signal generator further comprising a reference signal source, the differential signal generator is coupled to the controllable input node. A method of dual mode sensing and other embodiments are also disclosed.</abstract><oa>free_for_read</oa></addata></record>
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PHYSICS
STATIC STORES
title Sense amplifier with leakage testing and read debug capability
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-24T15%3A55%3A49IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HIROSE%20RYAN%20TASUO&rft.date=2009-06-09&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS7545694B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true