Calibration device for a phased locked loop synthesiser
A calibration device for a phase locked loop arranged to generate an output frequency based upon a first frequency range of an input signal applied to a first input and a second frequency range of the input signal applied to a second input, the calibration phase locked loop synthesizer device compri...
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creator | PRATT PATRICK J SCHARTZ DANIEL B NIGRA LOUIS M MILYARD MICHAEL A |
description | A calibration device for a phase locked loop arranged to generate an output frequency based upon a first frequency range of an input signal applied to a first input and a second frequency range of the input signal applied to a second input, the calibration phase locked loop synthesizer device comprising an estimator arranged to use a two dimensional estimation algorithm with a signal value indicative of a mismatch between the first input path and the second input path to determine an estimate of the mismatch to allow matching of the first input path and the second input path. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7532696B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7532696B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7532696B23</originalsourceid><addsrcrecordid>eNrjZDB3TszJTCpKLMnMz1NISS3LTE5VSMsvUkhUKMhILE5NUcjJT84GU_kFCsWVeSUZqcWZxalFPAysaYk5xam8UJqbQcHNNcTZQze1ID8-tbggMTk1L7UkPjTY3NTYyMzSzMnImAglAHVGLb4</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Calibration device for a phased locked loop synthesiser</title><source>esp@cenet</source><creator>PRATT PATRICK J ; SCHARTZ DANIEL B ; NIGRA LOUIS M ; MILYARD MICHAEL A</creator><creatorcontrib>PRATT PATRICK J ; SCHARTZ DANIEL B ; NIGRA LOUIS M ; MILYARD MICHAEL A</creatorcontrib><description>A calibration device for a phase locked loop arranged to generate an output frequency based upon a first frequency range of an input signal applied to a first input and a second frequency range of the input signal applied to a second input, the calibration phase locked loop synthesizer device comprising an estimator arranged to use a two dimensional estimation algorithm with a signal value indicative of a mismatch between the first input path and the second input path to determine an estimate of the mismatch to allow matching of the first input path and the second input path.</description><language>eng</language><subject>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES ; BASIC ELECTRONIC CIRCUITRY ; DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER ; ELECTRICITY ; MODULATION</subject><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20090512&DB=EPODOC&CC=US&NR=7532696B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20090512&DB=EPODOC&CC=US&NR=7532696B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PRATT PATRICK J</creatorcontrib><creatorcontrib>SCHARTZ DANIEL B</creatorcontrib><creatorcontrib>NIGRA LOUIS M</creatorcontrib><creatorcontrib>MILYARD MICHAEL A</creatorcontrib><title>Calibration device for a phased locked loop synthesiser</title><description>A calibration device for a phase locked loop arranged to generate an output frequency based upon a first frequency range of an input signal applied to a first input and a second frequency range of the input signal applied to a second input, the calibration phase locked loop synthesizer device comprising an estimator arranged to use a two dimensional estimation algorithm with a signal value indicative of a mismatch between the first input path and the second input path to determine an estimate of the mismatch to allow matching of the first input path and the second input path.</description><subject>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER</subject><subject>ELECTRICITY</subject><subject>MODULATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDB3TszJTCpKLMnMz1NISS3LTE5VSMsvUkhUKMhILE5NUcjJT84GU_kFCsWVeSUZqcWZxalFPAysaYk5xam8UJqbQcHNNcTZQze1ID8-tbggMTk1L7UkPjTY3NTYyMzSzMnImAglAHVGLb4</recordid><startdate>20090512</startdate><enddate>20090512</enddate><creator>PRATT PATRICK J</creator><creator>SCHARTZ DANIEL B</creator><creator>NIGRA LOUIS M</creator><creator>MILYARD MICHAEL A</creator><scope>EVB</scope></search><sort><creationdate>20090512</creationdate><title>Calibration device for a phased locked loop synthesiser</title><author>PRATT PATRICK J ; SCHARTZ DANIEL B ; NIGRA LOUIS M ; MILYARD MICHAEL A</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7532696B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><topic>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER</topic><topic>ELECTRICITY</topic><topic>MODULATION</topic><toplevel>online_resources</toplevel><creatorcontrib>PRATT PATRICK J</creatorcontrib><creatorcontrib>SCHARTZ DANIEL B</creatorcontrib><creatorcontrib>NIGRA LOUIS M</creatorcontrib><creatorcontrib>MILYARD MICHAEL A</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PRATT PATRICK J</au><au>SCHARTZ DANIEL B</au><au>NIGRA LOUIS M</au><au>MILYARD MICHAEL A</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Calibration device for a phased locked loop synthesiser</title><date>2009-05-12</date><risdate>2009</risdate><abstract>A calibration device for a phase locked loop arranged to generate an output frequency based upon a first frequency range of an input signal applied to a first input and a second frequency range of the input signal applied to a second input, the calibration phase locked loop synthesizer device comprising an estimator arranged to use a two dimensional estimation algorithm with a signal value indicative of a mismatch between the first input path and the second input path to determine an estimate of the mismatch to allow matching of the first input path and the second input path.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER ELECTRICITY MODULATION |
title | Calibration device for a phased locked loop synthesiser |
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