System for expanding a window of valid data

In one general embodiment, a design structure is provided including a first delay line having at least one buffer, the first delay line being for shifting a clock, a second delay line having at least one buffer, the second delay line being for shifting data, and a logic block adapted to identify a p...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	MILTON DAVID WILLS, KUEMERLE MARK WILLIAM, BERHANU MALEDE WONDMAGEGNE, SMITH JACK ROBERT, OGILVIE CLARENCE ROSSER, HANUDEL CHRISTOPHER DOUGLAS
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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