Total ionizing dose suppression transistor architecture

A total ionizing dose suppression architecture for a transistor and a transistor circuit uses an "end cap" metal structure that is connected to the lowest potential voltage to overcome the tendency of negative charge buildup during exposure to ionizing radiation. The suppression architectu...

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Bibliographische Detailangaben

1. Verfasser:	GARDNER HARRY N
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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