Package substrate and semiconductor package using the same

A package substrate may have an improved surface structure for controlling the flow of an adhesive. The package substrate may have an upper surface and a lower surface covered with a passivation layer. A window may be provided in, for example, the center of the package substrate. Sinks may be provid...

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Hauptverfasser: RYU JUNG-SEOK, KIM PYOUNG-WAN
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creator RYU JUNG-SEOK
KIM PYOUNG-WAN
description A package substrate may have an improved surface structure for controlling the flow of an adhesive. The package substrate may have an upper surface and a lower surface covered with a passivation layer. A window may be provided in, for example, the center of the package substrate. Sinks may be provided on the lower surface, clear of the passivation layer. The semiconductor package may have an indented or non-planar surface structure.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7498679B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7498679B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7498679B23</originalsourceid><addsrcrecordid>eNrjZLAKSEzOTkxPVSguTSouKUosSVVIzEtRKE7NzUzOz0spTS7JL1IogKopLc7MS1coyQCqTsxN5WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcVATal5qSXxocHmJpYWZuaWTkbGRCgBADBbLws</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Package substrate and semiconductor package using the same</title><source>esp@cenet</source><creator>RYU JUNG-SEOK ; KIM PYOUNG-WAN</creator><creatorcontrib>RYU JUNG-SEOK ; KIM PYOUNG-WAN</creatorcontrib><description>A package substrate may have an improved surface structure for controlling the flow of an adhesive. The package substrate may have an upper surface and a lower surface covered with a passivation layer. A window may be provided in, for example, the center of the package substrate. Sinks may be provided on the lower surface, clear of the passivation layer. The semiconductor package may have an indented or non-planar surface structure.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20090303&amp;DB=EPODOC&amp;CC=US&amp;NR=7498679B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20090303&amp;DB=EPODOC&amp;CC=US&amp;NR=7498679B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>RYU JUNG-SEOK</creatorcontrib><creatorcontrib>KIM PYOUNG-WAN</creatorcontrib><title>Package substrate and semiconductor package using the same</title><description>A package substrate may have an improved surface structure for controlling the flow of an adhesive. The package substrate may have an upper surface and a lower surface covered with a passivation layer. A window may be provided in, for example, the center of the package substrate. Sinks may be provided on the lower surface, clear of the passivation layer. The semiconductor package may have an indented or non-planar surface structure.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAKSEzOTkxPVSguTSouKUosSVVIzEtRKE7NzUzOz0spTS7JL1IogKopLc7MS1coyQCqTsxN5WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcVATal5qSXxocHmJpYWZuaWTkbGRCgBADBbLws</recordid><startdate>20090303</startdate><enddate>20090303</enddate><creator>RYU JUNG-SEOK</creator><creator>KIM PYOUNG-WAN</creator><scope>EVB</scope></search><sort><creationdate>20090303</creationdate><title>Package substrate and semiconductor package using the same</title><author>RYU JUNG-SEOK ; KIM PYOUNG-WAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7498679B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>RYU JUNG-SEOK</creatorcontrib><creatorcontrib>KIM PYOUNG-WAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>RYU JUNG-SEOK</au><au>KIM PYOUNG-WAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Package substrate and semiconductor package using the same</title><date>2009-03-03</date><risdate>2009</risdate><abstract>A package substrate may have an improved surface structure for controlling the flow of an adhesive. The package substrate may have an upper surface and a lower surface covered with a passivation layer. A window may be provided in, for example, the center of the package substrate. Sinks may be provided on the lower surface, clear of the passivation layer. The semiconductor package may have an indented or non-planar surface structure.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Package substrate and semiconductor package using the same
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-24T15%3A12%3A27IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=RYU%20JUNG-SEOK&rft.date=2009-03-03&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS7498679B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true