Device and method for fabricating double-sided SOI wafer scale package with optical through via connections

Device and method for fabricating double-sided SOI wafer scale package with optical through via connections

A semiconductor package includes an SOI wafer having a first side including an integrated circuit system, and a second side, opposite the first side, forming at least one cavity. At least one chip or component is placed in the cavity. An optical through via is formed through a buried oxide which opt...

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Hauptverfasser: HSU LOUIS LUN, CHEN HOWARD HAO
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator HSU LOUIS LUN
CHEN HOWARD HAO
description A semiconductor package includes an SOI wafer having a first side including an integrated circuit system, and a second side, opposite the first side, forming at least one cavity. At least one chip or component is placed in the cavity. An optical through via is formed through a buried oxide which optically connects the chip(s) to the integrated circuit system.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Device and method for fabricating double-sided SOI wafer scale package with optical through via connections
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