Method and apparatus for efficient utilization for prescient instruction prefetch

Embodiments of an apparatus, system and method enhance the efficiency of processor resource utilization during instruction prefetching via one or more speculative threads. Renamer logic and a map table are utilized to perform filtering of instructions in a speculative thread instruction stream. The...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	LIAO STEVE SHIH-WEI, SHEN JOHN P, HAMMARLUND PER, WANG HONG, AAMODT TOR M, WANG PERRY H
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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