Erasure FEC decoder and method

Disclosed is a method and erasure FEC decoder for correcting a pattern of errors by a two-dimensional decoding, the pattern of errors comprising at least two codewords in both a first and a second dimensions with a number of errors in common higher than the capacity of the code which is used for dec...

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Hauptverfasser: CUCCHI SILVIO, RINALDI SONIA, ANDREASI MARCO
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creator CUCCHI SILVIO
RINALDI SONIA
ANDREASI MARCO
description Disclosed is a method and erasure FEC decoder for correcting a pattern of errors by a two-dimensional decoding, the pattern of errors comprising at least two codewords in both a first and a second dimensions with a number of errors in common higher than the capacity of the code which is used for decoding. The method comprises the steps of: performing a full capacity decoding along the second dimension for removing possible false corrections introduced by a previous decoding performed along the first dimension; performing a reduced-capacity decoding along the first dimension, for identifying errored codewords along the first dimension; performing a full capacity decoding along the second dimension with disabled correction feature for identifying errored codewords along the second dimension; detecting the error coordinates from the information from steps b) and c); and correcting the detected pattern of errors.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7346826B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7346826B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7346826B23</originalsourceid><addsrcrecordid>eNrjZJBzLUosLi1KVXBzdVZISU3OT0ktUkjMS1HITS3JyE_hYWBNS8wpTuWF0twMQIUhzh66qQX58anFBYnJqXmpJfGhwebGJmYWRmZORsZEKAEAZ9sjjg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Erasure FEC decoder and method</title><source>esp@cenet</source><creator>CUCCHI SILVIO ; RINALDI SONIA ; ANDREASI MARCO</creator><creatorcontrib>CUCCHI SILVIO ; RINALDI SONIA ; ANDREASI MARCO</creatorcontrib><description>Disclosed is a method and erasure FEC decoder for correcting a pattern of errors by a two-dimensional decoding, the pattern of errors comprising at least two codewords in both a first and a second dimensions with a number of errors in common higher than the capacity of the code which is used for decoding. The method comprises the steps of: performing a full capacity decoding along the second dimension for removing possible false corrections introduced by a previous decoding performed along the first dimension; performing a reduced-capacity decoding along the first dimension, for identifying errored codewords along the first dimension; performing a full capacity decoding along the second dimension with disabled correction feature for identifying errored codewords along the second dimension; detecting the error coordinates from the information from steps b) and c); and correcting the detected pattern of errors.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; ELECTRICITY</subject><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20080318&amp;DB=EPODOC&amp;CC=US&amp;NR=7346826B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20080318&amp;DB=EPODOC&amp;CC=US&amp;NR=7346826B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CUCCHI SILVIO</creatorcontrib><creatorcontrib>RINALDI SONIA</creatorcontrib><creatorcontrib>ANDREASI MARCO</creatorcontrib><title>Erasure FEC decoder and method</title><description>Disclosed is a method and erasure FEC decoder for correcting a pattern of errors by a two-dimensional decoding, the pattern of errors comprising at least two codewords in both a first and a second dimensions with a number of errors in common higher than the capacity of the code which is used for decoding. The method comprises the steps of: performing a full capacity decoding along the second dimension for removing possible false corrections introduced by a previous decoding performed along the first dimension; performing a reduced-capacity decoding along the first dimension, for identifying errored codewords along the first dimension; performing a full capacity decoding along the second dimension with disabled correction feature for identifying errored codewords along the second dimension; detecting the error coordinates from the information from steps b) and c); and correcting the detected pattern of errors.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2008</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJBzLUosLi1KVXBzdVZISU3OT0ktUkjMS1HITS3JyE_hYWBNS8wpTuWF0twMQIUhzh66qQX58anFBYnJqXmpJfGhwebGJmYWRmZORsZEKAEAZ9sjjg</recordid><startdate>20080318</startdate><enddate>20080318</enddate><creator>CUCCHI SILVIO</creator><creator>RINALDI SONIA</creator><creator>ANDREASI MARCO</creator><scope>EVB</scope></search><sort><creationdate>20080318</creationdate><title>Erasure FEC decoder and method</title><author>CUCCHI SILVIO ; RINALDI SONIA ; ANDREASI MARCO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7346826B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2008</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>CUCCHI SILVIO</creatorcontrib><creatorcontrib>RINALDI SONIA</creatorcontrib><creatorcontrib>ANDREASI MARCO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CUCCHI SILVIO</au><au>RINALDI SONIA</au><au>ANDREASI MARCO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Erasure FEC decoder and method</title><date>2008-03-18</date><risdate>2008</risdate><abstract>Disclosed is a method and erasure FEC decoder for correcting a pattern of errors by a two-dimensional decoding, the pattern of errors comprising at least two codewords in both a first and a second dimensions with a number of errors in common higher than the capacity of the code which is used for decoding. The method comprises the steps of: performing a full capacity decoding along the second dimension for removing possible false corrections introduced by a previous decoding performed along the first dimension; performing a reduced-capacity decoding along the first dimension, for identifying errored codewords along the first dimension; performing a full capacity decoding along the second dimension with disabled correction feature for identifying errored codewords along the second dimension; detecting the error coordinates from the information from steps b) and c); and correcting the detected pattern of errors.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRONIC CIRCUITRY
CODE CONVERSION IN GENERAL
CODING
DECODING
ELECTRICITY
title Erasure FEC decoder and method
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-18T16%3A56%3A26IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CUCCHI%20SILVIO&rft.date=2008-03-18&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS7346826B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true