Method for fabrication of semiconductor interconnect structure with reduced capacitance, leakage current, and improved breakdown voltage

An etching process for selectively etching exposed metal surfaces of a substrate and forming a conductive capping layer over the metal surfaces is described. In some embodiments, the etching process involves oxidation of the exposed metal to form a metal oxide that is subsequently removed from the s...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	PARK HEUNG L, KOOS DANIEL A, MAYER STEVEN T, MOUNTSIER THOMAS, CLEARY TIMOTHY PATRICK
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!