Integrated memory controller

A memory system comprises a memory that includes at least one of Synchronous Dynamic Random Access Memory (SDRAM) and Double Data Rate SDRAM (DDR). A memory controller communicates with the memory, generates an SDRAM clock signal, and receives a bi-directional sampling clock signal (DQS). When the m...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	WHITE THEODORE C, JAYABHARATHI DINESH
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
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