Silicon chip carrier with conductive through-vias and method for fabricating same

A carrier structure and method for fabricating a carrier structure with through-vias each having a conductive structure with an effective coefficient of thermal expansion which is less than or closely matched to that of the substrate, and having an effective elastic modulus value which is less than...

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Hauptverfasser: WALKER GEORGE FREDERICK, PATEL CHIRAG SURYAKANT, STEEN MICHELLE LEIGH, SPROGIS EDMUND JURIS, LANE MICHAEL WAYNE, TSANG CORNELIA K, EDELSTEIN DANIEL CHARLES, LIU XIAO HU, HOUGHAM GARETH GEOFFREY, HORTON RAYMOND R, SUNDLOF BRIAN RICHARD, GOMA SHERIF A, ANDRY PAUL STEPHEN, CASEY JON ALFRED, BUCHWALTER LEENA PAIVIKKI
Format: Patent
Sprache:eng
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