Silicon chip carrier with conductive through-vias and method for fabricating same
A carrier structure and method for fabricating a carrier structure with through-vias each having a conductive structure with an effective coefficient of thermal expansion which is less than or closely matched to that of the substrate, and having an effective elastic modulus value which is less than...
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| creator | WALKER GEORGE FREDERICK PATEL CHIRAG SURYAKANT STEEN MICHELLE LEIGH SPROGIS EDMUND JURIS LANE MICHAEL WAYNE TSANG CORNELIA K EDELSTEIN DANIEL CHARLES LIU XIAO HU HOUGHAM GARETH GEOFFREY HORTON RAYMOND R SUNDLOF BRIAN RICHARD GOMA SHERIF A ANDRY PAUL STEPHEN CASEY JON ALFRED BUCHWALTER LEENA PAIVIKKI |
| description | A carrier structure and method for fabricating a carrier structure with through-vias each having a conductive structure with an effective coefficient of thermal expansion which is less than or closely matched to that of the substrate, and having an effective elastic modulus value which is less than or closely matches that of the substrate. The conductive structure may include concentric via fill areas having differing materials disposed concentrically therein, a core of the substrate material surrounded by an annular ring of conductive material, a core of CTE-matched non-conductive material surrounded by an annular ring of conductive material, a conductive via having an inner void with low CTE, or a full fill of a conductive composite material such as a metal-ceramic paste which has been sintered or fused. |
| format | Patent |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Silicon chip carrier with conductive through-vias and method for fabricating same |
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