Phased transmit architecture

A Phased Transmit Architecture that allows the embedded processor of an IEEE 802.11e wireless communication device to have a significant number of additional cycles between decoding of a QoS frame and the deadlines for generating a response transmission.

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Bibliographische Detailangaben
Hauptverfasser:	TURKI KHALED, GAMMEL MICHELE B, CHHAYA HARSHAL S, SHOEMAKE MATTHEW B
Format:	Patent
Sprache:	eng
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY MULTIPLEX COMMUNICATION TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION WIRELESS COMMUNICATIONS NETWORKS
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Beschreibung
Zusammenfassung:	A Phased Transmit Architecture that allows the embedded processor of an IEEE 802.11e wireless communication device to have a significant number of additional cycles between decoding of a QoS frame and the deadlines for generating a response transmission.