Leadless plastic chip carrier with etch back pad singulation
A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an inte...
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creator | LAU WING HIM TSANG KWOK CHEUNG FAN CHUN HO KWAN KIN PUI MCLELLAN NEIL |
description | A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7271032B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7271032B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7271032B13</originalsourceid><addsrcrecordid>eNrjZLDxSU1MyUktLlYoyEksLslMVkjOyCxQSE4sKspMLVIozyzJUEgtSc5QSEpMzlYoSExRKM7MSy_NSSzJzM_jYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocHmRuaGBsZGTobGRCgBAHk8L1s</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Leadless plastic chip carrier with etch back pad singulation</title><source>esp@cenet</source><creator>LAU WING HIM ; TSANG KWOK CHEUNG ; FAN CHUN HO ; KWAN KIN PUI ; MCLELLAN NEIL</creator><creatorcontrib>LAU WING HIM ; TSANG KWOK CHEUNG ; FAN CHUN HO ; KWAN KIN PUI ; MCLELLAN NEIL</creatorcontrib><description>A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20070918&DB=EPODOC&CC=US&NR=7271032B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20070918&DB=EPODOC&CC=US&NR=7271032B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LAU WING HIM</creatorcontrib><creatorcontrib>TSANG KWOK CHEUNG</creatorcontrib><creatorcontrib>FAN CHUN HO</creatorcontrib><creatorcontrib>KWAN KIN PUI</creatorcontrib><creatorcontrib>MCLELLAN NEIL</creatorcontrib><title>Leadless plastic chip carrier with etch back pad singulation</title><description>A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLDxSU1MyUktLlYoyEksLslMVkjOyCxQSE4sKspMLVIozyzJUEgtSc5QSEpMzlYoSExRKM7MSy_NSSzJzM_jYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocHmRuaGBsZGTobGRCgBAHk8L1s</recordid><startdate>20070918</startdate><enddate>20070918</enddate><creator>LAU WING HIM</creator><creator>TSANG KWOK CHEUNG</creator><creator>FAN CHUN HO</creator><creator>KWAN KIN PUI</creator><creator>MCLELLAN NEIL</creator><scope>EVB</scope></search><sort><creationdate>20070918</creationdate><title>Leadless plastic chip carrier with etch back pad singulation</title><author>LAU WING HIM ; TSANG KWOK CHEUNG ; FAN CHUN HO ; KWAN KIN PUI ; MCLELLAN NEIL</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7271032B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LAU WING HIM</creatorcontrib><creatorcontrib>TSANG KWOK CHEUNG</creatorcontrib><creatorcontrib>FAN CHUN HO</creatorcontrib><creatorcontrib>KWAN KIN PUI</creatorcontrib><creatorcontrib>MCLELLAN NEIL</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LAU WING HIM</au><au>TSANG KWOK CHEUNG</au><au>FAN CHUN HO</au><au>KWAN KIN PUI</au><au>MCLELLAN NEIL</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Leadless plastic chip carrier with etch back pad singulation</title><date>2007-09-18</date><risdate>2007</risdate><abstract>A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Leadless plastic chip carrier with etch back pad singulation |
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