Stackable single package and stacked multi-chip assembly

A stackable packaged chip includes a substrate with a conductive wiring formed therein or thereon. The substrate further includes a plurality of substrate contact pads arranged around a periphery portion of the substrate. A chip mounted on the substrate including contact pads that are electrically c...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: REISS WERNER, HETZEL WOLFGANG
Format: Patent
Sprache:eng
Schlagworte:
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