High-speed, low-power input buffer for integrated circuit devices

A high-speed, low-power input buffer for an integrated circuit device in which the input voltage (VIN) is coupled to both a pull-up and a pull-down transistor. In accordance with a specific embodiment, the input buffer utilizes a reference voltage input (VREF) during a calibration phase of operation...

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Bibliographische Detailangaben
1. Verfasser: BUTLER DOUGLAS BLAINE
Format: Patent
Sprache:eng
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