Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode

Apparatus for an on-chip decoupling capacitor. The capacitor includes a bottom electrode that consist of nanostructures deposited over a planarized metal, a dielectric material deposited over the nanostructures, and a top electrode deposited over the dielectric material. The shape of the bottom elec...

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Hauptverfasser:	KELLAR SCOT A, KIM SARAH E
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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creator	KELLAR SCOT A KIM SARAH E
description	Apparatus for an on-chip decoupling capacitor. The capacitor includes a bottom electrode that consist of nanostructures deposited over a planarized metal, a dielectric material deposited over the nanostructures, and a top electrode deposited over the dielectric material. The shape of the bottom electrode is tunable by modulating the diameter and/or the length of the nanostructures to produce an increase in capacitance without increasing the footprint of the on-chip decoupling capacitor.
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fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7244983B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7244983B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7244983B23</originalsourceid><addsrcrecordid>eNqNjDEOwjAQBN1QIOAP94E0SSSgBYFoqICKIjLnC7FkfJbvzPsxEg-gWu3saOfmfiad2IGNDhy9PRKMnIFjg5NPFSGXFHx8Atpk0Wsdi3x7tJFFc0EtmQSswINV-QUUCDWzo6WZjTYIrX65MHA8XPenhhIPJPWOIulwu6zbvt9uul3b_aF8ABUNO60</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode</title><source>esp@cenet</source><creator>KELLAR SCOT A ; KIM SARAH E</creator><creatorcontrib>KELLAR SCOT A ; KIM SARAH E</creatorcontrib><description>Apparatus for an on-chip decoupling capacitor. The capacitor includes a bottom electrode that consist of nanostructures deposited over a planarized metal, a dielectric material deposited over the nanostructures, and a top electrode deposited over the dielectric material. The shape of the bottom electrode is tunable by modulating the diameter and/or the length of the nanostructures to produce an increase in capacitance without increasing the footprint of the on-chip decoupling capacitor.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20070717&DB=EPODOC&CC=US&NR=7244983B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20070717&DB=EPODOC&CC=US&NR=7244983B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KELLAR SCOT A</creatorcontrib><creatorcontrib>KIM SARAH E</creatorcontrib><title>Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode</title><description>Apparatus for an on-chip decoupling capacitor. The capacitor includes a bottom electrode that consist of nanostructures deposited over a planarized metal, a dielectric material deposited over the nanostructures, and a top electrode deposited over the dielectric material. The shape of the bottom electrode is tunable by modulating the diameter and/or the length of the nanostructures to produce an increase in capacitance without increasing the footprint of the on-chip decoupling capacitor.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjDEOwjAQBN1QIOAP94E0SSSgBYFoqICKIjLnC7FkfJbvzPsxEg-gWu3saOfmfiad2IGNDhy9PRKMnIFjg5NPFSGXFHx8Atpk0Wsdi3x7tJFFc0EtmQSswINV-QUUCDWzo6WZjTYIrX65MHA8XPenhhIPJPWOIulwu6zbvt9uul3b_aF8ABUNO60</recordid><startdate>20070717</startdate><enddate>20070717</enddate><creator>KELLAR SCOT A</creator><creator>KIM SARAH E</creator><scope>EVB</scope></search><sort><creationdate>20070717</creationdate><title>Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode</title><author>KELLAR SCOT A ; KIM SARAH E</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7244983B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KELLAR SCOT A</creatorcontrib><creatorcontrib>KIM SARAH E</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KELLAR SCOT A</au><au>KIM SARAH E</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode</title><date>2007-07-17</date><risdate>2007</risdate><abstract>Apparatus for an on-chip decoupling capacitor. The capacitor includes a bottom electrode that consist of nanostructures deposited over a planarized metal, a dielectric material deposited over the nanostructures, and a top electrode deposited over the dielectric material. The shape of the bottom electrode is tunable by modulating the diameter and/or the length of the nanostructures to produce an increase in capacitance without increasing the footprint of the on-chip decoupling capacitor.</abstract><oa>free_for_read</oa></addata></record>
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title	Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-11T06%3A37%3A59IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KELLAR%20SCOT%20A&rft.date=2007-07-17&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS7244983B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true