Method and apparatus for a multiplexed address line driver

A method and apparatus for multiplexing various voltage magnitudes onto the address line of a memory cell. An address line voltage generator applies complex analog voltage magnitudes to a memory cell address line during Power On Reset (POR) to insure proper memory cell initialization during power up...

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Hauptverfasser:	SCHULTZ DAVID P, VADI VASISHT MANTRA
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
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creator	SCHULTZ DAVID P VADI VASISHT MANTRA
description	A method and apparatus for multiplexing various voltage magnitudes onto the address line of a memory cell. An address line voltage generator applies complex analog voltage magnitudes to a memory cell address line during Power On Reset (POR) to insure proper memory cell initialization during power up. Once initialized, read and write address select signals are level shifted to be equal to or greater than the read and write voltage magnitudes applied to the memory cell address line to ensure proper operation.
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subjects	INFORMATION STORAGE PHYSICS STATIC STORES
title	Method and apparatus for a multiplexed address line driver
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