Multiprocessor system with cache-based software breakpoints

Techniques are disclosed for implementing software breakpoints in a multiprocessor system having a number of processors each coupled to a main memory. In an illustrative embodiment, each of the processors has an instruction cache associated therewith. An instruction for which a breakpoint is to be i...

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Bibliographische Detailangaben
Hauptverfasser: BETKER MICHAEL RICHARD, WHALEN SHAUN PATRICK, SCHLIEDER BRYAN, WILSHIRE JAY PATRICK, NGUYEN HAN Q
Format: Patent
Sprache:eng
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