Edge seal for a semiconductor device

Edge seal for a semiconductor device

An edge seal around the periphery of an integrated circuit device which environmentally protects the copper circuitry from cracks that may form in the low-k interlevel dielectric during dicing. The edge seal essentially constitutes a dielectric wall between the copper circuitry and the low-k interle...

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Hauptverfasser: NGUYEN DU BINH, AGARWALA BIRENDRA N, RATHORE HAZARA SINGH, ENGEL BRETT H, PROCTER RICHARD W, LLERA-HURLBURT DIANA, TIAN CHUNYAN E, DALAL HORMAZDYAR MINOCHER, LINIGER ERIC G
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator NGUYEN DU BINH
AGARWALA BIRENDRA N
RATHORE HAZARA SINGH
ENGEL BRETT H
PROCTER RICHARD W
LLERA-HURLBURT DIANA
TIAN CHUNYAN E
DALAL HORMAZDYAR MINOCHER
LINIGER ERIC G
description An edge seal around the periphery of an integrated circuit device which environmentally protects the copper circuitry from cracks that may form in the low-k interlevel dielectric during dicing. The edge seal essentially constitutes a dielectric wall between the copper circuitry and the low-k interlevel dielectric near the periphery of the integrated circuit device. The dielectric wall is of a different material than the low-k interlevel dielectric.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7163883B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7163883B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7163883B23</originalsourceid><addsrcrecordid>eNrjZFBxTUlPVShOTcxRSMsvUkgEMnMzk_PzUkqTS4D8lNSyzORUHgbWtMSc4lReKM3NoODmGuLsoZtakB-fWlyQmJyal1oSHxpsbmhmbGFh7GRkTIQSAJlSJjY</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Edge seal for a semiconductor device</title><source>esp@cenet</source><creator>NGUYEN DU BINH ; AGARWALA BIRENDRA N ; RATHORE HAZARA SINGH ; ENGEL BRETT H ; PROCTER RICHARD W ; LLERA-HURLBURT DIANA ; TIAN CHUNYAN E ; DALAL HORMAZDYAR MINOCHER ; LINIGER ERIC G</creator><creatorcontrib>NGUYEN DU BINH ; AGARWALA BIRENDRA N ; RATHORE HAZARA SINGH ; ENGEL BRETT H ; PROCTER RICHARD W ; LLERA-HURLBURT DIANA ; TIAN CHUNYAN E ; DALAL HORMAZDYAR MINOCHER ; LINIGER ERIC G</creatorcontrib><description>An edge seal around the periphery of an integrated circuit device which environmentally protects the copper circuitry from cracks that may form in the low-k interlevel dielectric during dicing. The edge seal essentially constitutes a dielectric wall between the copper circuitry and the low-k interlevel dielectric near the periphery of the integrated circuit device. The dielectric wall is of a different material than the low-k interlevel dielectric.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20070116&amp;DB=EPODOC&amp;CC=US&amp;NR=7163883B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20070116&amp;DB=EPODOC&amp;CC=US&amp;NR=7163883B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>NGUYEN DU BINH</creatorcontrib><creatorcontrib>AGARWALA BIRENDRA N</creatorcontrib><creatorcontrib>RATHORE HAZARA SINGH</creatorcontrib><creatorcontrib>ENGEL BRETT H</creatorcontrib><creatorcontrib>PROCTER RICHARD W</creatorcontrib><creatorcontrib>LLERA-HURLBURT DIANA</creatorcontrib><creatorcontrib>TIAN CHUNYAN E</creatorcontrib><creatorcontrib>DALAL HORMAZDYAR MINOCHER</creatorcontrib><creatorcontrib>LINIGER ERIC G</creatorcontrib><title>Edge seal for a semiconductor device</title><description>An edge seal around the periphery of an integrated circuit device which environmentally protects the copper circuitry from cracks that may form in the low-k interlevel dielectric during dicing. The edge seal essentially constitutes a dielectric wall between the copper circuitry and the low-k interlevel dielectric near the periphery of the integrated circuit device. The dielectric wall is of a different material than the low-k interlevel dielectric.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFBxTUlPVShOTcxRSMsvUkgEMnMzk_PzUkqTS4D8lNSyzORUHgbWtMSc4lReKM3NoODmGuLsoZtakB-fWlyQmJyal1oSHxpsbmhmbGFh7GRkTIQSAJlSJjY</recordid><startdate>20070116</startdate><enddate>20070116</enddate><creator>NGUYEN DU BINH</creator><creator>AGARWALA BIRENDRA N</creator><creator>RATHORE HAZARA SINGH</creator><creator>ENGEL BRETT H</creator><creator>PROCTER RICHARD W</creator><creator>LLERA-HURLBURT DIANA</creator><creator>TIAN CHUNYAN E</creator><creator>DALAL HORMAZDYAR MINOCHER</creator><creator>LINIGER ERIC G</creator><scope>EVB</scope></search><sort><creationdate>20070116</creationdate><title>Edge seal for a semiconductor device</title><author>NGUYEN DU BINH ; AGARWALA BIRENDRA N ; RATHORE HAZARA SINGH ; ENGEL BRETT H ; PROCTER RICHARD W ; LLERA-HURLBURT DIANA ; TIAN CHUNYAN E ; DALAL HORMAZDYAR MINOCHER ; LINIGER ERIC G</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7163883B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>NGUYEN DU BINH</creatorcontrib><creatorcontrib>AGARWALA BIRENDRA N</creatorcontrib><creatorcontrib>RATHORE HAZARA SINGH</creatorcontrib><creatorcontrib>ENGEL BRETT H</creatorcontrib><creatorcontrib>PROCTER RICHARD W</creatorcontrib><creatorcontrib>LLERA-HURLBURT DIANA</creatorcontrib><creatorcontrib>TIAN CHUNYAN E</creatorcontrib><creatorcontrib>DALAL HORMAZDYAR MINOCHER</creatorcontrib><creatorcontrib>LINIGER ERIC G</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>NGUYEN DU BINH</au><au>AGARWALA BIRENDRA N</au><au>RATHORE HAZARA SINGH</au><au>ENGEL BRETT H</au><au>PROCTER RICHARD W</au><au>LLERA-HURLBURT DIANA</au><au>TIAN CHUNYAN E</au><au>DALAL HORMAZDYAR MINOCHER</au><au>LINIGER ERIC G</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Edge seal for a semiconductor device</title><date>2007-01-16</date><risdate>2007</risdate><abstract>An edge seal around the periphery of an integrated circuit device which environmentally protects the copper circuitry from cracks that may form in the low-k interlevel dielectric during dicing. The edge seal essentially constitutes a dielectric wall between the copper circuitry and the low-k interlevel dielectric near the periphery of the integrated circuit device. The dielectric wall is of a different material than the low-k interlevel dielectric.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Edge seal for a semiconductor device
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-19T02%3A51%3A41IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=NGUYEN%20DU%20BINH&rft.date=2007-01-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS7163883B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true