Redundancy register architecture for soft-error tolerance and methods of making the same

A redundancy register architecture associated with a RAM provides for soft-error tolerance. An enable register provides soft error rate protection to the registers that contain replacement information for redundant rows and columns. The gate register determines whether a row or column replacement re...

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Bibliographische Detailangaben

Hauptverfasser:	OPPOLD JEFFREY H, WISSELL LARRY, OUELLETTE MICHAEL R
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRICITY INFORMATION STORAGE PHYSICS STATIC STORES
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