Dft technique for avoiding contention/conflict in logic built-in self-test

A packaged component includes a pattern generator for generating successive random data patterns. The component further includes a programmable constraint correction module, coupled to the pattern generator, to replace undesirable random data patterns with desirable bit sequences to overcome bus con...

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Bibliographische Detailangaben

Hauptverfasser:	GALIVANCHE RAJESH, KUNDU SANDIP, SENGUPTA SANJAY
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS STATIC STORES TESTING
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