Processor with packet processing order maintenance based on packet flow identifiers

A processor having a packet processing order maintenance feature includes classification circuitry operative to identify for each of a plurality of packets received in the processor a corresponding packet flow identifier, control circuitry operatively coupled to the classification circuitry, and at...

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Hauptverfasser: BROWN DAVID ALLEN, CALLE MAURICIO, PRASAD ABRAHAM
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Sprache:eng
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creator BROWN DAVID ALLEN
CALLE MAURICIO
PRASAD ABRAHAM
description A processor having a packet processing order maintenance feature includes classification circuitry operative to identify for each of a plurality of packets received in the processor a corresponding packet flow identifier, control circuitry operatively coupled to the classification circuitry, and at least one operational unit operatively coupled to the control circuitry. The control circuitry is operative to direct one or more packets having a given packet flow identifier to the operational unit(s) in a manner that maintains a desired function call sequencing over the one or more packets having the given packet flow identifier for one or more order-dependent processing tasks in the processor.
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subjects ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
title Processor with packet processing order maintenance based on packet flow identifiers
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