Area efficient stacking of antifuses in semiconductor device

A semiconductor device is provided which is formed of a wafer having on a surface thereof an area efficient arrangement of at least two antifuses in vertically stacked relation and sharing a common intermediate electrode therebetween. The arrangement includes at least one lower antifuse having a low...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	DANIEL GABRIEL, BRINTZINGER AXEL CHRISTOPH, LEHMANN GUNTHER
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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