Dual word line mode for DRAMs

An integrated circuit memory includes circuitry for individually activating word lines in a first one memory cell per bit operational mode, simultaneously activating at least two word lines in a second operational mode where two or more memory cells are dedicated to each data bit, and providing a wo...

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Bibliographische Detailangaben

Hauptverfasser:	PARRIS MICHAEL C, BUTLER DOUGLAS BLAINE, JONES, JR. OSCAR FREDERICK
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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