Linearized digital phase-locked loop

A method of synchronizing a clock signal to a data signal, comprising the steps of (A) detecting a first edge of the data signal and a position of the first edge, (B) determining if the position is within a zone, (C) if the edge is not within the zone, adjusting the clock signal towards the position...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	WILLIAMS BERTRAND J, DALMIA KAMAL, JORDAN TIMOTHY D, LITTLE TERRY D
Format:	Patent
Sprache:	eng
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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