Exposure mask, method for manufacturing the mask, and exposure method

As shown in FIG. 2 , a multi-layer structured exposure mask 1 of this embodiment is provided with a frame 20 made of glass, a silicon plate 15 provided on an under surface of the frame 20 , a heat absorption mask 16 provided on an under surface of the silicon plate 15 , a silicon plate 11 provided o...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: HISATSUGU TOKUSHIGE, SASAGO MASARU, ENDO MASAYUKI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator HISATSUGU TOKUSHIGE
SASAGO MASARU
ENDO MASAYUKI
description As shown in FIG. 2 , a multi-layer structured exposure mask 1 of this embodiment is provided with a frame 20 made of glass, a silicon plate 15 provided on an under surface of the frame 20 , a heat absorption mask 16 provided on an under surface of the silicon plate 15 , a silicon plate 11 provided on an under surface of the heat absorption mask 16 and a stencil mask 14 provided on an under surface of the silicon plate 11 . The stencil mask 14 is made up of a silicon substrate and is provided with a slit-shaped patterning opening 14 a to form a resist pattern. The heat absorption mask 16 is made up of a silicon substrate coated with an SiN film and is provided with slit-shaped openings 16 a shaped in almost the same way as the patterning openings 14 a of the stencil mask 14 . The opening 16 a is shaped in such a size that will not block electron beams necessary to form a resist pattern as shown in FIG. 3 (a). That is, a size of the opening 16 a is equal to a size of the patterning opening 14 a or a size of the opening 16 a is a little larger Furthermore, the multi-layer structured exposure mask 1 of this embodiment is provided with a large opening 20 a that penetrates the frame 20 and silicon plate 15 and exposes the area of the upper surface of the heat absorption mask 16 in which the openings 16 a are formed. Furthermore, the multi-layer structured exposure mask 1 of this embodiment is provided with a hollow section 11 a that penetrates the silicon plate 11 and exposes the area of the under surface of the heat absorption mask 16 in which the openings 16 a are formed and the area of the upper surface of the stencil mask 14 in which the patterning openings 14 a are formed. In the multi-layer structured exposure mask 1 of this embodiment, the patterning openings 14 a of the stencil mask 14 and the openings 16 a of the heat absorption mask 16 are aligned in the horizontal direction as shown in FIG. 3 (a).
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6913857B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6913857B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6913857B23</originalsourceid><addsrcrecordid>eNrjZHB1rSjILy4tSlXITSzO1lHITS3JyE9RSMsvAgrklaYlJpeUFmXmpSuUZMCUJOalKKTCdYHV8zCwpiXmFKfyQmluBgU31xBnD93Ugvz41OKCxOTUvNSS-NBgM0tDYwtTcycjYyKUAACCfTLj</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Exposure mask, method for manufacturing the mask, and exposure method</title><source>esp@cenet</source><creator>HISATSUGU TOKUSHIGE ; SASAGO MASARU ; ENDO MASAYUKI</creator><creatorcontrib>HISATSUGU TOKUSHIGE ; SASAGO MASARU ; ENDO MASAYUKI</creatorcontrib><description>As shown in FIG. 2 , a multi-layer structured exposure mask 1 of this embodiment is provided with a frame 20 made of glass, a silicon plate 15 provided on an under surface of the frame 20 , a heat absorption mask 16 provided on an under surface of the silicon plate 15 , a silicon plate 11 provided on an under surface of the heat absorption mask 16 and a stencil mask 14 provided on an under surface of the silicon plate 11 . The stencil mask 14 is made up of a silicon substrate and is provided with a slit-shaped patterning opening 14 a to form a resist pattern. The heat absorption mask 16 is made up of a silicon substrate coated with an SiN film and is provided with slit-shaped openings 16 a shaped in almost the same way as the patterning openings 14 a of the stencil mask 14 . The opening 16 a is shaped in such a size that will not block electron beams necessary to form a resist pattern as shown in FIG. 3 (a). That is, a size of the opening 16 a is equal to a size of the patterning opening 14 a or a size of the opening 16 a is a little larger Furthermore, the multi-layer structured exposure mask 1 of this embodiment is provided with a large opening 20 a that penetrates the frame 20 and silicon plate 15 and exposes the area of the upper surface of the heat absorption mask 16 in which the openings 16 a are formed. Furthermore, the multi-layer structured exposure mask 1 of this embodiment is provided with a hollow section 11 a that penetrates the silicon plate 11 and exposes the area of the under surface of the heat absorption mask 16 in which the openings 16 a are formed and the area of the upper surface of the stencil mask 14 in which the patterning openings 14 a are formed. In the multi-layer structured exposure mask 1 of this embodiment, the patterning openings 14 a of the stencil mask 14 and the openings 16 a of the heat absorption mask 16 are aligned in the horizontal direction as shown in FIG. 3 (a).</description><edition>7</edition><language>eng</language><subject>APPARATUS SPECIALLY ADAPTED THEREFOR ; AUXILIARY PROCESSES IN PHOTOGRAPHY ; BASIC ELECTRIC ELEMENTS ; CINEMATOGRAPHY ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; ELECTROGRAPHY ; HOLOGRAPHY ; MATERIALS THEREFOR ; ORIGINALS THEREFOR ; PHOTOGRAPHIC PROCESSES, e.g. CINE, X-RAY, COLOUR,STEREO-PHOTOGRAPHIC PROCESSES ; PHOTOGRAPHY ; PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES ; PHOTOSENSITIVE MATERIALS FOR PHOTOGRAPHIC PURPOSES ; PHYSICS ; SEMICONDUCTOR DEVICES</subject><creationdate>2005</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20050705&amp;DB=EPODOC&amp;CC=US&amp;NR=6913857B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20050705&amp;DB=EPODOC&amp;CC=US&amp;NR=6913857B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HISATSUGU TOKUSHIGE</creatorcontrib><creatorcontrib>SASAGO MASARU</creatorcontrib><creatorcontrib>ENDO MASAYUKI</creatorcontrib><title>Exposure mask, method for manufacturing the mask, and exposure method</title><description>As shown in FIG. 2 , a multi-layer structured exposure mask 1 of this embodiment is provided with a frame 20 made of glass, a silicon plate 15 provided on an under surface of the frame 20 , a heat absorption mask 16 provided on an under surface of the silicon plate 15 , a silicon plate 11 provided on an under surface of the heat absorption mask 16 and a stencil mask 14 provided on an under surface of the silicon plate 11 . The stencil mask 14 is made up of a silicon substrate and is provided with a slit-shaped patterning opening 14 a to form a resist pattern. The heat absorption mask 16 is made up of a silicon substrate coated with an SiN film and is provided with slit-shaped openings 16 a shaped in almost the same way as the patterning openings 14 a of the stencil mask 14 . The opening 16 a is shaped in such a size that will not block electron beams necessary to form a resist pattern as shown in FIG. 3 (a). That is, a size of the opening 16 a is equal to a size of the patterning opening 14 a or a size of the opening 16 a is a little larger Furthermore, the multi-layer structured exposure mask 1 of this embodiment is provided with a large opening 20 a that penetrates the frame 20 and silicon plate 15 and exposes the area of the upper surface of the heat absorption mask 16 in which the openings 16 a are formed. Furthermore, the multi-layer structured exposure mask 1 of this embodiment is provided with a hollow section 11 a that penetrates the silicon plate 11 and exposes the area of the under surface of the heat absorption mask 16 in which the openings 16 a are formed and the area of the upper surface of the stencil mask 14 in which the patterning openings 14 a are formed. In the multi-layer structured exposure mask 1 of this embodiment, the patterning openings 14 a of the stencil mask 14 and the openings 16 a of the heat absorption mask 16 are aligned in the horizontal direction as shown in FIG. 3 (a).</description><subject>APPARATUS SPECIALLY ADAPTED THEREFOR</subject><subject>AUXILIARY PROCESSES IN PHOTOGRAPHY</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CINEMATOGRAPHY</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>ELECTROGRAPHY</subject><subject>HOLOGRAPHY</subject><subject>MATERIALS THEREFOR</subject><subject>ORIGINALS THEREFOR</subject><subject>PHOTOGRAPHIC PROCESSES, e.g. CINE, X-RAY, COLOUR,STEREO-PHOTOGRAPHIC PROCESSES</subject><subject>PHOTOGRAPHY</subject><subject>PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES</subject><subject>PHOTOSENSITIVE MATERIALS FOR PHOTOGRAPHIC PURPOSES</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2005</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHB1rSjILy4tSlXITSzO1lHITS3JyE9RSMsvAgrklaYlJpeUFmXmpSuUZMCUJOalKKTCdYHV8zCwpiXmFKfyQmluBgU31xBnD93Ugvz41OKCxOTUvNSS-NBgM0tDYwtTcycjYyKUAACCfTLj</recordid><startdate>20050705</startdate><enddate>20050705</enddate><creator>HISATSUGU TOKUSHIGE</creator><creator>SASAGO MASARU</creator><creator>ENDO MASAYUKI</creator><scope>EVB</scope></search><sort><creationdate>20050705</creationdate><title>Exposure mask, method for manufacturing the mask, and exposure method</title><author>HISATSUGU TOKUSHIGE ; SASAGO MASARU ; ENDO MASAYUKI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6913857B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2005</creationdate><topic>APPARATUS SPECIALLY ADAPTED THEREFOR</topic><topic>AUXILIARY PROCESSES IN PHOTOGRAPHY</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CINEMATOGRAPHY</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>ELECTROGRAPHY</topic><topic>HOLOGRAPHY</topic><topic>MATERIALS THEREFOR</topic><topic>ORIGINALS THEREFOR</topic><topic>PHOTOGRAPHIC PROCESSES, e.g. CINE, X-RAY, COLOUR,STEREO-PHOTOGRAPHIC PROCESSES</topic><topic>PHOTOGRAPHY</topic><topic>PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES</topic><topic>PHOTOSENSITIVE MATERIALS FOR PHOTOGRAPHIC PURPOSES</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>HISATSUGU TOKUSHIGE</creatorcontrib><creatorcontrib>SASAGO MASARU</creatorcontrib><creatorcontrib>ENDO MASAYUKI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HISATSUGU TOKUSHIGE</au><au>SASAGO MASARU</au><au>ENDO MASAYUKI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Exposure mask, method for manufacturing the mask, and exposure method</title><date>2005-07-05</date><risdate>2005</risdate><abstract>As shown in FIG. 2 , a multi-layer structured exposure mask 1 of this embodiment is provided with a frame 20 made of glass, a silicon plate 15 provided on an under surface of the frame 20 , a heat absorption mask 16 provided on an under surface of the silicon plate 15 , a silicon plate 11 provided on an under surface of the heat absorption mask 16 and a stencil mask 14 provided on an under surface of the silicon plate 11 . The stencil mask 14 is made up of a silicon substrate and is provided with a slit-shaped patterning opening 14 a to form a resist pattern. The heat absorption mask 16 is made up of a silicon substrate coated with an SiN film and is provided with slit-shaped openings 16 a shaped in almost the same way as the patterning openings 14 a of the stencil mask 14 . The opening 16 a is shaped in such a size that will not block electron beams necessary to form a resist pattern as shown in FIG. 3 (a). That is, a size of the opening 16 a is equal to a size of the patterning opening 14 a or a size of the opening 16 a is a little larger Furthermore, the multi-layer structured exposure mask 1 of this embodiment is provided with a large opening 20 a that penetrates the frame 20 and silicon plate 15 and exposes the area of the upper surface of the heat absorption mask 16 in which the openings 16 a are formed. Furthermore, the multi-layer structured exposure mask 1 of this embodiment is provided with a hollow section 11 a that penetrates the silicon plate 11 and exposes the area of the under surface of the heat absorption mask 16 in which the openings 16 a are formed and the area of the upper surface of the stencil mask 14 in which the patterning openings 14 a are formed. In the multi-layer structured exposure mask 1 of this embodiment, the patterning openings 14 a of the stencil mask 14 and the openings 16 a of the heat absorption mask 16 are aligned in the horizontal direction as shown in FIG. 3 (a).</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US6913857B2
source esp@cenet
subjects APPARATUS SPECIALLY ADAPTED THEREFOR
AUXILIARY PROCESSES IN PHOTOGRAPHY
BASIC ELECTRIC ELEMENTS
CINEMATOGRAPHY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
ELECTROGRAPHY
HOLOGRAPHY
MATERIALS THEREFOR
ORIGINALS THEREFOR
PHOTOGRAPHIC PROCESSES, e.g. CINE, X-RAY, COLOUR,STEREO-PHOTOGRAPHIC PROCESSES
PHOTOGRAPHY
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES
PHOTOSENSITIVE MATERIALS FOR PHOTOGRAPHIC PURPOSES
PHYSICS
SEMICONDUCTOR DEVICES
title Exposure mask, method for manufacturing the mask, and exposure method
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-28T23%3A50%3A16IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HISATSUGU%20TOKUSHIGE&rft.date=2005-07-05&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6913857B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true