Method for producing an electronic package possessing controlled impedance characteristics
A method for creating an impedance controlled printing wiring board, particularly the formation of a structure for high speed printed wiring boards incorporating multiple differential impedance controlled layers. Furthermore, disclosed is the provision of a method for producing an impedance controll...
Gespeichert in:
| Hauptverfasser: | , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | UNGER KEVIN P WOZNIAK MICHAEL RUDIK WILLIAM J MILLER THOMAS R TESTA ROBERT J |
| description | A method for creating an impedance controlled printing wiring board, particularly the formation of a structure for high speed printed wiring boards incorporating multiple differential impedance controlled layers. Furthermore, disclosed is the provision of a method for producing an impedance controlled printed circuit wiring board. Also, there is the provision of a method for producing high speed printed wiring boards with multiple differential impedance controlled layers. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6845557B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6845557B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6845557B23</originalsourceid><addsrcrecordid>eNqNjDEOwjAQBNNQIOAP9wEaIEAdBKKhAhqa6HTeJBbGZ_nM_wkSD6CaYkYzrR4XlEEddZopZXVv8bEnjoQAKVmjF0osT-5BSc1g9g1E4yhDgCP_SnAcBSQDZ5aC7K14sXk16TgYFj_OKjodb4fzEklb2HhFRGnv1-1-U9f1rlmt_0g-IkU73w</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method for producing an electronic package possessing controlled impedance characteristics</title><source>esp@cenet</source><creator>UNGER KEVIN P ; WOZNIAK MICHAEL ; RUDIK WILLIAM J ; MILLER THOMAS R ; TESTA ROBERT J</creator><creatorcontrib>UNGER KEVIN P ; WOZNIAK MICHAEL ; RUDIK WILLIAM J ; MILLER THOMAS R ; TESTA ROBERT J</creatorcontrib><description>A method for creating an impedance controlled printing wiring board, particularly the formation of a structure for high speed printed wiring boards incorporating multiple differential impedance controlled layers. Furthermore, disclosed is the provision of a method for producing an impedance controlled printed circuit wiring board. Also, there is the provision of a method for producing high speed printed wiring boards with multiple differential impedance controlled layers.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC ; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES ; TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION ; TECHNICAL SUBJECTS COVERED BY FORMER USPC ; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</subject><creationdate>2005</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20050125&DB=EPODOC&CC=US&NR=6845557B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20050125&DB=EPODOC&CC=US&NR=6845557B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>UNGER KEVIN P</creatorcontrib><creatorcontrib>WOZNIAK MICHAEL</creatorcontrib><creatorcontrib>RUDIK WILLIAM J</creatorcontrib><creatorcontrib>MILLER THOMAS R</creatorcontrib><creatorcontrib>TESTA ROBERT J</creatorcontrib><title>Method for producing an electronic package possessing controlled impedance characteristics</title><description>A method for creating an impedance controlled printing wiring board, particularly the formation of a structure for high speed printed wiring boards incorporating multiple differential impedance controlled layers. Furthermore, disclosed is the provision of a method for producing an impedance controlled printed circuit wiring board. Also, there is the provision of a method for producing high speed printed wiring boards with multiple differential impedance controlled layers.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</subject><subject>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2005</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjDEOwjAQBNNQIOAP9wEaIEAdBKKhAhqa6HTeJBbGZ_nM_wkSD6CaYkYzrR4XlEEddZopZXVv8bEnjoQAKVmjF0osT-5BSc1g9g1E4yhDgCP_SnAcBSQDZ5aC7K14sXk16TgYFj_OKjodb4fzEklb2HhFRGnv1-1-U9f1rlmt_0g-IkU73w</recordid><startdate>20050125</startdate><enddate>20050125</enddate><creator>UNGER KEVIN P</creator><creator>WOZNIAK MICHAEL</creator><creator>RUDIK WILLIAM J</creator><creator>MILLER THOMAS R</creator><creator>TESTA ROBERT J</creator><scope>EVB</scope></search><sort><creationdate>20050125</creationdate><title>Method for producing an electronic package possessing controlled impedance characteristics</title><author>UNGER KEVIN P ; WOZNIAK MICHAEL ; RUDIK WILLIAM J ; MILLER THOMAS R ; TESTA ROBERT J</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6845557B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2005</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</topic><topic>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</topic><toplevel>online_resources</toplevel><creatorcontrib>UNGER KEVIN P</creatorcontrib><creatorcontrib>WOZNIAK MICHAEL</creatorcontrib><creatorcontrib>RUDIK WILLIAM J</creatorcontrib><creatorcontrib>MILLER THOMAS R</creatorcontrib><creatorcontrib>TESTA ROBERT J</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>UNGER KEVIN P</au><au>WOZNIAK MICHAEL</au><au>RUDIK WILLIAM J</au><au>MILLER THOMAS R</au><au>TESTA ROBERT J</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for producing an electronic package possessing controlled impedance characteristics</title><date>2005-01-25</date><risdate>2005</risdate><abstract>A method for creating an impedance controlled printing wiring board, particularly the formation of a structure for high speed printed wiring boards incorporating multiple differential impedance controlled layers. Furthermore, disclosed is the provision of a method for producing an impedance controlled printed circuit wiring board. Also, there is the provision of a method for producing high speed printed wiring boards with multiple differential impedance controlled layers.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US6845557B2 |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION TECHNICAL SUBJECTS COVERED BY FORMER USPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS |
| title | Method for producing an electronic package possessing controlled impedance characteristics |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-06T20%3A18%3A42IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=UNGER%20KEVIN%20P&rft.date=2005-01-25&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6845557B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |