VIA0 etch process for FRAM integration

A ferroelectric memory device comprises a logic programmable capacitance reference circuit. The circuit is adapted to generate a reference voltage during a sense mode of operation, wherein the reference voltage comprises a value that is a function of one more memory conditions. The memory device fur...

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Bibliographische Detailangaben

Hauptverfasser:	MOISE THEODORE S, CELII FRANCIS GABRIEL, SUMMERFELT SCOTT R, UDAYAKUMAR K. R
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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