Method of forming shallow trench isolation structure in a semiconductor device

A method for fabricating a shallow trench isolation structure is described, in which a bottom pad oxide layer, a middle silicon nitride layer, a middle oxide layer and a top silicon nitride layer are sequentially formed on a silicon substrate. Photolithographic masking and anisotropic etching are th...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	LARSEN BRADLEY J, DEGORS NICOLAS, ERICKSON DONALD A, KELKAR AMIT S, BARRY TIMOTHY M
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!