Digital to digital Sigma-Delta modulator and digital frequency synthesizer incorporating the same
A digital to digital Sigma-Delta modulator comprises an input which receives a digital input value encoded over N bits, an output which delivers a digital output value encoded over n bits, where n is less than N, and at least a first Sigma-Delta cell which includes a quantizer having a quantization...
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| creator | CAMINO LAURENT LEVEL PHILIPPE RAMET SERGE |
| description | A digital to digital Sigma-Delta modulator comprises an input which receives a digital input value encoded over N bits, an output which delivers a digital output value encoded over n bits, where n is less than N, and at least a first Sigma-Delta cell which includes a quantizer having a quantization interval which is a prime number. The choice of a prime number decreases the power of the limit cycles (lines with a power value higher than the local mean value) which may appear depending on the input code of the modulator and on the initial conditions. Application is proposed to a digital frequency synthesizer. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6822593B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6822593B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6822593B23</originalsourceid><addsrcrecordid>eNqNirsOwjAMALswIOAf_ANdUoFgpQWxF-bKStxgKS8SdyhfD0PFzHSn060r7NiyoAOJYBbt2XqsO3KC4KOZHErMgMH8jjHTa6KgZyhzkCcVflMGDjrmFDMKBwvfDAU9bavViK7QbuGmguvl3t5qSnGgklBTIBke_eGo1P7UnFXzx_IBtJA97w</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Digital to digital Sigma-Delta modulator and digital frequency synthesizer incorporating the same</title><source>esp@cenet</source><creator>CAMINO LAURENT ; LEVEL PHILIPPE ; RAMET SERGE</creator><creatorcontrib>CAMINO LAURENT ; LEVEL PHILIPPE ; RAMET SERGE</creatorcontrib><description>A digital to digital Sigma-Delta modulator comprises an input which receives a digital input value encoded over N bits, an output which delivers a digital output value encoded over n bits, where n is less than N, and at least a first Sigma-Delta cell which includes a quantizer having a quantization interval which is a prime number. The choice of a prime number decreases the power of the limit cycles (lines with a power value higher than the local mean value) which may appear depending on the input code of the modulator and on the initial conditions. Application is proposed to a digital frequency synthesizer.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; ELECTRICITY</subject><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20041123&DB=EPODOC&CC=US&NR=6822593B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20041123&DB=EPODOC&CC=US&NR=6822593B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CAMINO LAURENT</creatorcontrib><creatorcontrib>LEVEL PHILIPPE</creatorcontrib><creatorcontrib>RAMET SERGE</creatorcontrib><title>Digital to digital Sigma-Delta modulator and digital frequency synthesizer incorporating the same</title><description>A digital to digital Sigma-Delta modulator comprises an input which receives a digital input value encoded over N bits, an output which delivers a digital output value encoded over n bits, where n is less than N, and at least a first Sigma-Delta cell which includes a quantizer having a quantization interval which is a prime number. The choice of a prime number decreases the power of the limit cycles (lines with a power value higher than the local mean value) which may appear depending on the input code of the modulator and on the initial conditions. Application is proposed to a digital frequency synthesizer.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNirsOwjAMALswIOAf_ANdUoFgpQWxF-bKStxgKS8SdyhfD0PFzHSn060r7NiyoAOJYBbt2XqsO3KC4KOZHErMgMH8jjHTa6KgZyhzkCcVflMGDjrmFDMKBwvfDAU9bavViK7QbuGmguvl3t5qSnGgklBTIBke_eGo1P7UnFXzx_IBtJA97w</recordid><startdate>20041123</startdate><enddate>20041123</enddate><creator>CAMINO LAURENT</creator><creator>LEVEL PHILIPPE</creator><creator>RAMET SERGE</creator><scope>EVB</scope></search><sort><creationdate>20041123</creationdate><title>Digital to digital Sigma-Delta modulator and digital frequency synthesizer incorporating the same</title><author>CAMINO LAURENT ; LEVEL PHILIPPE ; RAMET SERGE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6822593B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>CAMINO LAURENT</creatorcontrib><creatorcontrib>LEVEL PHILIPPE</creatorcontrib><creatorcontrib>RAMET SERGE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CAMINO LAURENT</au><au>LEVEL PHILIPPE</au><au>RAMET SERGE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Digital to digital Sigma-Delta modulator and digital frequency synthesizer incorporating the same</title><date>2004-11-23</date><risdate>2004</risdate><abstract>A digital to digital Sigma-Delta modulator comprises an input which receives a digital input value encoded over N bits, an output which delivers a digital output value encoded over n bits, where n is less than N, and at least a first Sigma-Delta cell which includes a quantizer having a quantization interval which is a prime number. The choice of a prime number decreases the power of the limit cycles (lines with a power value higher than the local mean value) which may appear depending on the input code of the modulator and on the initial conditions. Application is proposed to a digital frequency synthesizer.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRICITY |
| title | Digital to digital Sigma-Delta modulator and digital frequency synthesizer incorporating the same |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-30T12%3A04%3A46IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CAMINO%20LAURENT&rft.date=2004-11-23&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6822593B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |