Maskless middle-of-line liner deposition

A process for fabricating a semiconductor structure, wherein the semiconductor structure includes a core region and a periphery region. The core region includes a plurality of transistors and the periphery region includes a plurality of transistors. The process includes depositing a middle-of-line l...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	BAKER STEVEN M, MALDEI MICHAEL, BERRY, II JON S, COUSINEAU BRIAN, LEE JINHWAN, GERSTMEIER GUENTER, HEDGE MALATI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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