Method and apparatus for testing a non-standard memory device under actual operating conditions

A method and apparatus for testing memory devices under actual operating conditions can accommodate non-standard memory devices through the use of an interface board that adapts a non-standard pin configuration to a standard pin configuration on a test substrate. The interface board can include a fi...

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Hauptverfasser: PARK SANG-JUN, KIM SUN-JU, PARK HYUN-HO, KIM CHANG-NYUN, SEO JIN-SEOP
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creator PARK SANG-JUN
KIM SUN-JU
PARK HYUN-HO
KIM CHANG-NYUN
SEO JIN-SEOP
description A method and apparatus for testing memory devices under actual operating conditions can accommodate non-standard memory devices through the use of an interface board that adapts a non-standard pin configuration to a standard pin configuration on a test substrate. The interface board can include a first surface on which to mount the non-standard device, a pin matching circuit, and a second surface constructed and arranged to couple the pin matching circuit to a standard pin configuration. The interface board can be mounted directly on the test substrate, or coupled to the test substrate through various arrangements of sockets, connection boards, and supports.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6819129B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6819129B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6819129B23</originalsourceid><addsrcrecordid>eNqNizEKAjEQANNYiPqH_cAVd4J4rYdiY6XWYUn2NHC3G5KN4O-N4AMshmlmlsZeSJ_iAbkSIybUkmGUBEpZAz8AgYWbrLXA5GGmWdIbPL2CIyjsKQE6LTiBRKr793HCPmgQzmuzGHHKtPl5ZeB0vA3nhqJYyhEdMam9X3f7tm-7_tBt_0g-Ixs9GA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method and apparatus for testing a non-standard memory device under actual operating conditions</title><source>esp@cenet</source><creator>PARK SANG-JUN ; KIM SUN-JU ; PARK HYUN-HO ; KIM CHANG-NYUN ; SEO JIN-SEOP</creator><creatorcontrib>PARK SANG-JUN ; KIM SUN-JU ; PARK HYUN-HO ; KIM CHANG-NYUN ; SEO JIN-SEOP</creatorcontrib><description>A method and apparatus for testing memory devices under actual operating conditions can accommodate non-standard memory devices through the use of an interface board that adapts a non-standard pin configuration to a standard pin configuration on a test substrate. The interface board can include a first surface on which to mount the non-standard device, a pin matching circuit, and a second surface constructed and arranged to couple the pin matching circuit to a standard pin configuration. The interface board can be mounted directly on the test substrate, or coupled to the test substrate through various arrangements of sockets, connection boards, and supports.</description><edition>7</edition><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20041116&amp;DB=EPODOC&amp;CC=US&amp;NR=6819129B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20041116&amp;DB=EPODOC&amp;CC=US&amp;NR=6819129B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PARK SANG-JUN</creatorcontrib><creatorcontrib>KIM SUN-JU</creatorcontrib><creatorcontrib>PARK HYUN-HO</creatorcontrib><creatorcontrib>KIM CHANG-NYUN</creatorcontrib><creatorcontrib>SEO JIN-SEOP</creatorcontrib><title>Method and apparatus for testing a non-standard memory device under actual operating conditions</title><description>A method and apparatus for testing memory devices under actual operating conditions can accommodate non-standard memory devices through the use of an interface board that adapts a non-standard pin configuration to a standard pin configuration on a test substrate. The interface board can include a first surface on which to mount the non-standard device, a pin matching circuit, and a second surface constructed and arranged to couple the pin matching circuit to a standard pin configuration. The interface board can be mounted directly on the test substrate, or coupled to the test substrate through various arrangements of sockets, connection boards, and supports.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNizEKAjEQANNYiPqH_cAVd4J4rYdiY6XWYUn2NHC3G5KN4O-N4AMshmlmlsZeSJ_iAbkSIybUkmGUBEpZAz8AgYWbrLXA5GGmWdIbPL2CIyjsKQE6LTiBRKr793HCPmgQzmuzGHHKtPl5ZeB0vA3nhqJYyhEdMam9X3f7tm-7_tBt_0g-Ixs9GA</recordid><startdate>20041116</startdate><enddate>20041116</enddate><creator>PARK SANG-JUN</creator><creator>KIM SUN-JU</creator><creator>PARK HYUN-HO</creator><creator>KIM CHANG-NYUN</creator><creator>SEO JIN-SEOP</creator><scope>EVB</scope></search><sort><creationdate>20041116</creationdate><title>Method and apparatus for testing a non-standard memory device under actual operating conditions</title><author>PARK SANG-JUN ; KIM SUN-JU ; PARK HYUN-HO ; KIM CHANG-NYUN ; SEO JIN-SEOP</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6819129B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>PARK SANG-JUN</creatorcontrib><creatorcontrib>KIM SUN-JU</creatorcontrib><creatorcontrib>PARK HYUN-HO</creatorcontrib><creatorcontrib>KIM CHANG-NYUN</creatorcontrib><creatorcontrib>SEO JIN-SEOP</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PARK SANG-JUN</au><au>KIM SUN-JU</au><au>PARK HYUN-HO</au><au>KIM CHANG-NYUN</au><au>SEO JIN-SEOP</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method and apparatus for testing a non-standard memory device under actual operating conditions</title><date>2004-11-16</date><risdate>2004</risdate><abstract>A method and apparatus for testing memory devices under actual operating conditions can accommodate non-standard memory devices through the use of an interface board that adapts a non-standard pin configuration to a standard pin configuration on a test substrate. The interface board can include a first surface on which to mount the non-standard device, a pin matching circuit, and a second surface constructed and arranged to couple the pin matching circuit to a standard pin configuration. The interface board can be mounted directly on the test substrate, or coupled to the test substrate through various arrangements of sockets, connection boards, and supports.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
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STATIC STORES
title Method and apparatus for testing a non-standard memory device under actual operating conditions
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-23T08%3A24%3A09IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=PARK%20SANG-JUN&rft.date=2004-11-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6819129B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true