Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process
Herein disclosed is an exposure technology for a semiconductor integrated circuit device which has a pattern as fine as that of an exposure wavelength. The technology contemplates to improve the resolution characteristics of the pattern by making use of the mutual interference of exposure luminous f...
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| creator | OKAMOTO YOSHIHIKO MORIUCHI NOBORU |
| description | Herein disclosed is an exposure technology for a semiconductor integrated circuit device which has a pattern as fine as that of an exposure wavelength. The technology contemplates to improve the resolution characteristics of the pattern by making use of the mutual interference of exposure luminous fluxes. |
| format | Patent |
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| language | eng |
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| subjects | APPARATUS SPECIALLY ADAPTED THEREFOR CINEMATOGRAPHY ELECTRICITY ELECTROGRAPHY HOLOGRAPHY MATERIALS THEREFOR ORIGINALS THEREFOR PHOTOGRAPHY PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES PHYSICS |
| title | Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process |
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