Synchronization of vertical retrace for multiple participating graphics computers

A system and method for synchronizing image display and buffer swapping in a multiple processor-multiple display environment. In a master-slave dichotomy, one processor or system is deemed the master and the others act as slaves. The master generates signals used to control vertical retrace and buff...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SARCAR KANOJ, TORNES JAMES, MUKHERJEE SHRIJEET
Format: Patent
Sprache:eng
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