Semiconductor device comprising CPU and peripheral circuit wherein control unit performs wait cycle control that makes peripheral circuit wait a predetermined time before responding to CPU
A semiconductor device includes a CPU and many peripheral circuits that are accessed by the CPU. Each peripheral circuit includes a wait control register which changeably holds wait cycle number information indicative of the number of wait cycles for an access by the CPU to that peripheral circuit,...
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| creator | SHIMAZU YUKIHIKO MORI YASUFUMI ITOU TERUYUKI |
| description | A semiconductor device includes a CPU and many peripheral circuits that are accessed by the CPU. Each peripheral circuit includes a wait control register which changeably holds wait cycle number information indicative of the number of wait cycles for an access by the CPU to that peripheral circuit, and a wait control circuit providing wait control for the access by the CPU to that peripheral circuit based on the number of wait cycles held by the wait control register. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6748464B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6748464B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6748464B23</originalsourceid><addsrcrecordid>eNqNjjtuAkEQRDchsAx36As4MauF2MiWQyRMvBr3FNBi56OeXiPuxuE8K1lEBI5a1XpVek_NbYcgnKIf2ZKSx48wiFPIKkXikTbbPbnoKUMln6BuIBblUYwuNUJipaNpGmiM9Vm5Q9JQ6OJq4isPuAN2ckbBnVEezk0FR1nhYdAgEZ5MAugbdRKkKLmaTlaWJrF5Mzu4oWDxd58b-nj_2ny-IKe-wo4RYf1-163addu1b6_LfyC_D5JgUw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device comprising CPU and peripheral circuit wherein control unit performs wait cycle control that makes peripheral circuit wait a predetermined time before responding to CPU</title><source>esp@cenet</source><creator>SHIMAZU YUKIHIKO ; MORI YASUFUMI ; ITOU TERUYUKI</creator><creatorcontrib>SHIMAZU YUKIHIKO ; MORI YASUFUMI ; ITOU TERUYUKI</creatorcontrib><description>A semiconductor device includes a CPU and many peripheral circuits that are accessed by the CPU. Each peripheral circuit includes a wait control register which changeably holds wait cycle number information indicative of the number of wait cycles for an access by the CPU to that peripheral circuit, and a wait control circuit providing wait control for the access by the CPU to that peripheral circuit based on the number of wait cycles held by the wait control register.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CALCULATING ; CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC ; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS ; PHYSICS ; SEMICONDUCTOR DEVICES ; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS ; TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE</subject><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20040608&DB=EPODOC&CC=US&NR=6748464B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20040608&DB=EPODOC&CC=US&NR=6748464B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SHIMAZU YUKIHIKO</creatorcontrib><creatorcontrib>MORI YASUFUMI</creatorcontrib><creatorcontrib>ITOU TERUYUKI</creatorcontrib><title>Semiconductor device comprising CPU and peripheral circuit wherein control unit performs wait cycle control that makes peripheral circuit wait a predetermined time before responding to CPU</title><description>A semiconductor device includes a CPU and many peripheral circuits that are accessed by the CPU. Each peripheral circuit includes a wait control register which changeably holds wait cycle number information indicative of the number of wait cycles for an access by the CPU to that peripheral circuit, and a wait control circuit providing wait control for the access by the CPU to that peripheral circuit based on the number of wait cycles held by the wait control register.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CALCULATING</subject><subject>CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</subject><subject>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</subject><subject>TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjjtuAkEQRDchsAx36As4MauF2MiWQyRMvBr3FNBi56OeXiPuxuE8K1lEBI5a1XpVek_NbYcgnKIf2ZKSx48wiFPIKkXikTbbPbnoKUMln6BuIBblUYwuNUJipaNpGmiM9Vm5Q9JQ6OJq4isPuAN2ckbBnVEezk0FR1nhYdAgEZ5MAugbdRKkKLmaTlaWJrF5Mzu4oWDxd58b-nj_2ny-IKe-wo4RYf1-163addu1b6_LfyC_D5JgUw</recordid><startdate>20040608</startdate><enddate>20040608</enddate><creator>SHIMAZU YUKIHIKO</creator><creator>MORI YASUFUMI</creator><creator>ITOU TERUYUKI</creator><scope>EVB</scope></search><sort><creationdate>20040608</creationdate><title>Semiconductor device comprising CPU and peripheral circuit wherein control unit performs wait cycle control that makes peripheral circuit wait a predetermined time before responding to CPU</title><author>SHIMAZU YUKIHIKO ; MORI YASUFUMI ; ITOU TERUYUKI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6748464B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CALCULATING</topic><topic>CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</topic><topic>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</topic><topic>TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE</topic><toplevel>online_resources</toplevel><creatorcontrib>SHIMAZU YUKIHIKO</creatorcontrib><creatorcontrib>MORI YASUFUMI</creatorcontrib><creatorcontrib>ITOU TERUYUKI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SHIMAZU YUKIHIKO</au><au>MORI YASUFUMI</au><au>ITOU TERUYUKI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device comprising CPU and peripheral circuit wherein control unit performs wait cycle control that makes peripheral circuit wait a predetermined time before responding to CPU</title><date>2004-06-08</date><risdate>2004</risdate><abstract>A semiconductor device includes a CPU and many peripheral circuits that are accessed by the CPU. Each peripheral circuit includes a wait control register which changeably holds wait cycle number information indicative of the number of wait cycles for an access by the CPU to that peripheral circuit, and a wait control circuit providing wait control for the access by the CPU to that peripheral circuit based on the number of wait cycles held by the wait control register.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| language | eng |
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| subjects | BASIC ELECTRIC ELEMENTS CALCULATING CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS PHYSICS SEMICONDUCTOR DEVICES TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE |
| title | Semiconductor device comprising CPU and peripheral circuit wherein control unit performs wait cycle control that makes peripheral circuit wait a predetermined time before responding to CPU |
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