Parity checking device and method in data communication system
There is provided parity checking device and method in a data communication system. In the parity checking device, a controller determines loop occurring times according to the length of the data and the number of bits to be shifted according to the data or XOR operation results and determines wheth...
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| creator | KANG MYUNG-GOO |
| description | There is provided parity checking device and method in a data communication system. In the parity checking device, a controller determines loop occurring times according to the length of the data and the number of bits to be shifted according to the data or XOR operation results and determines whether the data has an error based on a final XOR operation result. A first register and a second register store the data or the XOR operation results under the control of the controller. A shifter receives the output of the first register and shifts the received bits by the shift bit number received from the controller. An operation unit receives the outputs of the shifter and the second register, performs an XOR operation between the received data, and outputs an XOR operation result under the control of the controller. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6718514B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6718514B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6718514B23</originalsourceid><addsrcrecordid>eNrjZLALSCzKLKlUSM5ITc7OzEtXSEkty0xOVUjMS1HITS3JyE9RyMxTSEksSVRIzs_NLc3LTE4syczPUyiuLC5JzeVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwWbmhhamhiZORsZEKAEA9w8wXA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Parity checking device and method in data communication system</title><source>esp@cenet</source><creator>KANG MYUNG-GOO</creator><creatorcontrib>KANG MYUNG-GOO</creatorcontrib><description>There is provided parity checking device and method in a data communication system. In the parity checking device, a controller determines loop occurring times according to the length of the data and the number of bits to be shifted according to the data or XOR operation results and determines whether the data has an error based on a final XOR operation result. A first register and a second register store the data or the XOR operation results under the control of the controller. A shifter receives the output of the first register and shifts the received bits by the shift bit number received from the controller. An operation unit receives the outputs of the shifter and the second register, performs an XOR operation between the received data, and outputs an XOR operation result under the control of the controller.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20040406&DB=EPODOC&CC=US&NR=6718514B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20040406&DB=EPODOC&CC=US&NR=6718514B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KANG MYUNG-GOO</creatorcontrib><title>Parity checking device and method in data communication system</title><description>There is provided parity checking device and method in a data communication system. In the parity checking device, a controller determines loop occurring times according to the length of the data and the number of bits to be shifted according to the data or XOR operation results and determines whether the data has an error based on a final XOR operation result. A first register and a second register store the data or the XOR operation results under the control of the controller. A shifter receives the output of the first register and shifts the received bits by the shift bit number received from the controller. An operation unit receives the outputs of the shifter and the second register, performs an XOR operation between the received data, and outputs an XOR operation result under the control of the controller.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLALSCzKLKlUSM5ITc7OzEtXSEkty0xOVUjMS1HITS3JyE9RyMxTSEksSVRIzs_NLc3LTE4syczPUyiuLC5JzeVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwWbmhhamhiZORsZEKAEA9w8wXA</recordid><startdate>20040406</startdate><enddate>20040406</enddate><creator>KANG MYUNG-GOO</creator><scope>EVB</scope></search><sort><creationdate>20040406</creationdate><title>Parity checking device and method in data communication system</title><author>KANG MYUNG-GOO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6718514B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>KANG MYUNG-GOO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KANG MYUNG-GOO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Parity checking device and method in data communication system</title><date>2004-04-06</date><risdate>2004</risdate><abstract>There is provided parity checking device and method in a data communication system. In the parity checking device, a controller determines loop occurring times according to the length of the data and the number of bits to be shifted according to the data or XOR operation results and determines whether the data has an error based on a final XOR operation result. A first register and a second register store the data or the XOR operation results under the control of the controller. A shifter receives the output of the first register and shifts the received bits by the shift bit number received from the controller. An operation unit receives the outputs of the shifter and the second register, performs an XOR operation between the received data, and outputs an XOR operation result under the control of the controller.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
| title | Parity checking device and method in data communication system |
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