Fault insertion using on-card reprogrammable devices

Fault insertion using on-card reprogrammable devices

A method of inducing a fault within the boundary of an on-card reprogrammable logic device (RLD) by interactive injection of subtle candidate faults and comparison of expected error message from software diagnostics until all faults are tested. Upon completion of fault injection, the RLD is reprogra...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: KANIA MICHAEL J
Format: Patent
Sprache:eng
Schlagworte:
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator KANIA MICHAEL J
description A method of inducing a fault within the boundary of an on-card reprogrammable logic device (RLD) by interactive injection of subtle candidate faults and comparison of expected error message from software diagnostics until all faults are tested. Upon completion of fault injection, the RLD is reprogrammed to its proper functional faultless state.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6704894B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6704894B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6704894B13</originalsourceid><addsrcrecordid>eNrjZDBxSyzNKVHIzCtOLSrJzM9TKC3OzEtXyM_TTU4sSlEoSi0oyk8vSszNTUzKSVVISS3LTE4t5mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBZuYGJhaWJk6GxkQoAQD_vCzr</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Fault insertion using on-card reprogrammable devices</title><source>esp@cenet</source><creator>KANIA MICHAEL J</creator><creatorcontrib>KANIA MICHAEL J</creatorcontrib><description>A method of inducing a fault within the boundary of an on-card reprogrammable logic device (RLD) by interactive injection of subtle candidate faults and comparison of expected error message from software diagnostics until all faults are tested. Upon completion of fault injection, the RLD is reprogrammed to its proper functional faultless state.</description><edition>7</edition><language>eng</language><subject>MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20040309&amp;DB=EPODOC&amp;CC=US&amp;NR=6704894B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20040309&amp;DB=EPODOC&amp;CC=US&amp;NR=6704894B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KANIA MICHAEL J</creatorcontrib><title>Fault insertion using on-card reprogrammable devices</title><description>A method of inducing a fault within the boundary of an on-card reprogrammable logic device (RLD) by interactive injection of subtle candidate faults and comparison of expected error message from software diagnostics until all faults are tested. Upon completion of fault injection, the RLD is reprogrammed to its proper functional faultless state.</description><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDBxSyzNKVHIzCtOLSrJzM9TKC3OzEtXyM_TTU4sSlEoSi0oyk8vSszNTUzKSVVISS3LTE4t5mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBZuYGJhaWJk6GxkQoAQD_vCzr</recordid><startdate>20040309</startdate><enddate>20040309</enddate><creator>KANIA MICHAEL J</creator><scope>EVB</scope></search><sort><creationdate>20040309</creationdate><title>Fault insertion using on-card reprogrammable devices</title><author>KANIA MICHAEL J</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6704894B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>KANIA MICHAEL J</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KANIA MICHAEL J</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Fault insertion using on-card reprogrammable devices</title><date>2004-03-09</date><risdate>2004</risdate><abstract>A method of inducing a fault within the boundary of an on-card reprogrammable logic device (RLD) by interactive injection of subtle candidate faults and comparison of expected error message from software diagnostics until all faults are tested. Upon completion of fault injection, the RLD is reprogrammed to its proper functional faultless state.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US6704894B1
source esp@cenet
subjects MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
title Fault insertion using on-card reprogrammable devices
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-25T08%3A09%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KANIA%20MICHAEL%20J&rft.date=2004-03-09&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6704894B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true