Low memory and low latency cyclic prefix addition

Low memory and low latency cyclic prefix addition

Systems and methods for appending cyclic prefixes to OFDM bursts while employing minimal additional memory and adding minimal latency are provided. This facilitates lower cost implementations of OFDM communication systems including systems that carry real time traffic such as telephony and video con...

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Hauptverfasser: JONES, IV VINCENT K, ANIKHINDI SANTOSH
Format: Patent
Sprache:eng
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ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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creator JONES, IV VINCENT K
ANIKHINDI SANTOSH
description Systems and methods for appending cyclic prefixes to OFDM bursts while employing minimal additional memory and adding minimal latency are provided. This facilitates lower cost implementations of OFDM communication systems including systems that carry real time traffic such as telephony and video conferencing. The phases of frequency domain symbols are rotated prior to application of the IFFT so that cyclic prefix addition may be implemented as cyclic postfix addition. Cyclic postfix addition requires much less memory and imposes much less latency then cyclic prefix addition.
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subjects ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
title Low memory and low latency cyclic prefix addition
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