Method and structure for salicide trench capacitor plate electrode

Method and structure for salicide trench capacitor plate electrode

The present invention is a method and structure for fabricating a trench capacitor within a semiconductor substrate having a buried plate electrode formed of metal silicide. A collar is formed in a trench etched into a substrate; a conformal metal film is deposited thereover, and is annealed to form...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: CHUDZIK MICHAEL PATRICK, SETTLEMYER, JR. KENNETH T, JAMMY RAJARAO, RADENS CARL JOHN, MANDELMAN JACK ALLAN, SHAFER PADRAIC C, SHEPARD, JR. JOSEPH F
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator CHUDZIK MICHAEL PATRICK
SETTLEMYER, JR. KENNETH T
JAMMY RAJARAO
RADENS CARL JOHN
MANDELMAN JACK ALLAN
SHAFER PADRAIC C
SHEPARD, JR. JOSEPH F
description The present invention is a method and structure for fabricating a trench capacitor within a semiconductor substrate having a buried plate electrode formed of metal silicide. A collar is formed in a trench etched into a substrate; a conformal metal film is deposited thereover, and is annealed to form a silicide that is self-aligned to the collar. Silicide will not be formed on the collar, pads and other areas where the silicon is not directly exposed and hence the metal layer can be removed from these areas by selective etching.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6664161B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6664161B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6664161B23</originalsourceid><addsrcrecordid>eNqNizEOwjAQBN1QIOAP9wGKAPIDgkA0qYA6Op03iiXLts6X_ycFD6CaYmb2rh9gcwnEOVAzXcQWBU1FqXGKEgPIFFlmEq4s0TZTExsICWJaAo5uN3FqOP14cPR8fO6vM2oZ0bYLGTZ-3977W-e7_nL9I1kB9e4yCA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method and structure for salicide trench capacitor plate electrode</title><source>esp@cenet</source><creator>CHUDZIK MICHAEL PATRICK ; SETTLEMYER, JR. KENNETH T ; JAMMY RAJARAO ; RADENS CARL JOHN ; MANDELMAN JACK ALLAN ; SHAFER PADRAIC C ; SHEPARD, JR. JOSEPH F</creator><creatorcontrib>CHUDZIK MICHAEL PATRICK ; SETTLEMYER, JR. KENNETH T ; JAMMY RAJARAO ; RADENS CARL JOHN ; MANDELMAN JACK ALLAN ; SHAFER PADRAIC C ; SHEPARD, JR. JOSEPH F</creatorcontrib><description>The present invention is a method and structure for fabricating a trench capacitor within a semiconductor substrate having a buried plate electrode formed of metal silicide. A collar is formed in a trench etched into a substrate; a conformal metal film is deposited thereover, and is annealed to form a silicide that is self-aligned to the collar. Silicide will not be formed on the collar, pads and other areas where the silicon is not directly exposed and hence the metal layer can be removed from these areas by selective etching.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2003</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20031216&amp;DB=EPODOC&amp;CC=US&amp;NR=6664161B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20031216&amp;DB=EPODOC&amp;CC=US&amp;NR=6664161B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHUDZIK MICHAEL PATRICK</creatorcontrib><creatorcontrib>SETTLEMYER, JR. KENNETH T</creatorcontrib><creatorcontrib>JAMMY RAJARAO</creatorcontrib><creatorcontrib>RADENS CARL JOHN</creatorcontrib><creatorcontrib>MANDELMAN JACK ALLAN</creatorcontrib><creatorcontrib>SHAFER PADRAIC C</creatorcontrib><creatorcontrib>SHEPARD, JR. JOSEPH F</creatorcontrib><title>Method and structure for salicide trench capacitor plate electrode</title><description>The present invention is a method and structure for fabricating a trench capacitor within a semiconductor substrate having a buried plate electrode formed of metal silicide. A collar is formed in a trench etched into a substrate; a conformal metal film is deposited thereover, and is annealed to form a silicide that is self-aligned to the collar. Silicide will not be formed on the collar, pads and other areas where the silicon is not directly exposed and hence the metal layer can be removed from these areas by selective etching.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2003</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNizEOwjAQBN1QIOAP9wGKAPIDgkA0qYA6Op03iiXLts6X_ycFD6CaYmb2rh9gcwnEOVAzXcQWBU1FqXGKEgPIFFlmEq4s0TZTExsICWJaAo5uN3FqOP14cPR8fO6vM2oZ0bYLGTZ-3977W-e7_nL9I1kB9e4yCA</recordid><startdate>20031216</startdate><enddate>20031216</enddate><creator>CHUDZIK MICHAEL PATRICK</creator><creator>SETTLEMYER, JR. KENNETH T</creator><creator>JAMMY RAJARAO</creator><creator>RADENS CARL JOHN</creator><creator>MANDELMAN JACK ALLAN</creator><creator>SHAFER PADRAIC C</creator><creator>SHEPARD, JR. JOSEPH F</creator><scope>EVB</scope></search><sort><creationdate>20031216</creationdate><title>Method and structure for salicide trench capacitor plate electrode</title><author>CHUDZIK MICHAEL PATRICK ; SETTLEMYER, JR. KENNETH T ; JAMMY RAJARAO ; RADENS CARL JOHN ; MANDELMAN JACK ALLAN ; SHAFER PADRAIC C ; SHEPARD, JR. JOSEPH F</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6664161B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2003</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHUDZIK MICHAEL PATRICK</creatorcontrib><creatorcontrib>SETTLEMYER, JR. KENNETH T</creatorcontrib><creatorcontrib>JAMMY RAJARAO</creatorcontrib><creatorcontrib>RADENS CARL JOHN</creatorcontrib><creatorcontrib>MANDELMAN JACK ALLAN</creatorcontrib><creatorcontrib>SHAFER PADRAIC C</creatorcontrib><creatorcontrib>SHEPARD, JR. JOSEPH F</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHUDZIK MICHAEL PATRICK</au><au>SETTLEMYER, JR. KENNETH T</au><au>JAMMY RAJARAO</au><au>RADENS CARL JOHN</au><au>MANDELMAN JACK ALLAN</au><au>SHAFER PADRAIC C</au><au>SHEPARD, JR. JOSEPH F</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method and structure for salicide trench capacitor plate electrode</title><date>2003-12-16</date><risdate>2003</risdate><abstract>The present invention is a method and structure for fabricating a trench capacitor within a semiconductor substrate having a buried plate electrode formed of metal silicide. A collar is formed in a trench etched into a substrate; a conformal metal film is deposited thereover, and is annealed to form a silicide that is self-aligned to the collar. Silicide will not be formed on the collar, pads and other areas where the silicon is not directly exposed and hence the metal layer can be removed from these areas by selective etching.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US6664161B2
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Method and structure for salicide trench capacitor plate electrode
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-02T12%3A22%3A56IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHUDZIK%20MICHAEL%20PATRICK&rft.date=2003-12-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6664161B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true