Method of performing a two stage anneal in the formation of an alloy interconnect
A method of performing a two stage anneal in the formation of an alloy interconnect can include forming a via aperture in a dielectric layer where the via aperture provides an area for formation of a via, providing a seed layer along lateral side walls of the via aperture, rapid thermal annealing th...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | WANG PININ CONNIE BESSER PAUL R |
description | A method of performing a two stage anneal in the formation of an alloy interconnect can include forming a via aperture in a dielectric layer where the via aperture provides an area for formation of a via, providing a seed layer along lateral side walls of the via aperture, rapid thermal annealing the seed layer to facilitate copper grain growth in the via, and slowly annealing the seed layer to facilitate desired distribution of alloy doping. The use of two anneals-one fast (e.g., 60 seconds) at lower temperatures (e.g., 150° C. to 250° C.) and one slow (e.g., minutes to several hours) at higher temperatures (e.g., 200° C. to 450° C.)-helps to control grain growth and alloy doping distribution. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6656836B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6656836B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6656836B13</originalsourceid><addsrcrecordid>eNqNyzEKAjEQheFtLES9w1zAQhaDtaLYWIhaL0N82Q3EmZAMiLd3FzyA1Sv-782b6wU26JM0UEYJWl5RemKyt1I17kEsAk4UhWwATYItqkwPFuKU9DNGQ_E6Sm_LZhY4Vax-u2jodLwfzmtk7VAzewise9yc27pd6_ab9g_yBS5fNx0</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method of performing a two stage anneal in the formation of an alloy interconnect</title><source>esp@cenet</source><creator>WANG PININ CONNIE ; BESSER PAUL R</creator><creatorcontrib>WANG PININ CONNIE ; BESSER PAUL R</creatorcontrib><description>A method of performing a two stage anneal in the formation of an alloy interconnect can include forming a via aperture in a dielectric layer where the via aperture provides an area for formation of a via, providing a seed layer along lateral side walls of the via aperture, rapid thermal annealing the seed layer to facilitate copper grain growth in the via, and slowly annealing the seed layer to facilitate desired distribution of alloy doping. The use of two anneals-one fast (e.g., 60 seconds) at lower temperatures (e.g., 150° C. to 250° C.) and one slow (e.g., minutes to several hours) at higher temperatures (e.g., 200° C. to 450° C.)-helps to control grain growth and alloy doping distribution.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2003</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20031202&DB=EPODOC&CC=US&NR=6656836B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20031202&DB=EPODOC&CC=US&NR=6656836B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WANG PININ CONNIE</creatorcontrib><creatorcontrib>BESSER PAUL R</creatorcontrib><title>Method of performing a two stage anneal in the formation of an alloy interconnect</title><description>A method of performing a two stage anneal in the formation of an alloy interconnect can include forming a via aperture in a dielectric layer where the via aperture provides an area for formation of a via, providing a seed layer along lateral side walls of the via aperture, rapid thermal annealing the seed layer to facilitate copper grain growth in the via, and slowly annealing the seed layer to facilitate desired distribution of alloy doping. The use of two anneals-one fast (e.g., 60 seconds) at lower temperatures (e.g., 150° C. to 250° C.) and one slow (e.g., minutes to several hours) at higher temperatures (e.g., 200° C. to 450° C.)-helps to control grain growth and alloy doping distribution.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2003</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyzEKAjEQheFtLES9w1zAQhaDtaLYWIhaL0N82Q3EmZAMiLd3FzyA1Sv-782b6wU26JM0UEYJWl5RemKyt1I17kEsAk4UhWwATYItqkwPFuKU9DNGQ_E6Sm_LZhY4Vax-u2jodLwfzmtk7VAzewise9yc27pd6_ab9g_yBS5fNx0</recordid><startdate>20031202</startdate><enddate>20031202</enddate><creator>WANG PININ CONNIE</creator><creator>BESSER PAUL R</creator><scope>EVB</scope></search><sort><creationdate>20031202</creationdate><title>Method of performing a two stage anneal in the formation of an alloy interconnect</title><author>WANG PININ CONNIE ; BESSER PAUL R</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6656836B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2003</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>WANG PININ CONNIE</creatorcontrib><creatorcontrib>BESSER PAUL R</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WANG PININ CONNIE</au><au>BESSER PAUL R</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method of performing a two stage anneal in the formation of an alloy interconnect</title><date>2003-12-02</date><risdate>2003</risdate><abstract>A method of performing a two stage anneal in the formation of an alloy interconnect can include forming a via aperture in a dielectric layer where the via aperture provides an area for formation of a via, providing a seed layer along lateral side walls of the via aperture, rapid thermal annealing the seed layer to facilitate copper grain growth in the via, and slowly annealing the seed layer to facilitate desired distribution of alloy doping. The use of two anneals-one fast (e.g., 60 seconds) at lower temperatures (e.g., 150° C. to 250° C.) and one slow (e.g., minutes to several hours) at higher temperatures (e.g., 200° C. to 450° C.)-helps to control grain growth and alloy doping distribution.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US6656836B1 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Method of performing a two stage anneal in the formation of an alloy interconnect |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-14T14%3A15%3A15IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=WANG%20PININ%20CONNIE&rft.date=2003-12-02&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6656836B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |