Application specific integrated circuit with dual-mode system for externally accessible data buses and visibility buses
An application specific integrated circuit includes a multiplicity of operational blocks each of which includes at least one respective data bus and at least one respective visibility bus and a respective addressable multiplexer for selecting between those buses to provide an output on a to respecti...
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| creator | CASEY FERGUS HAY CHRISTOPHER CHOI KAM GIBSON PATRICK LOUGHRAN KEVIN ALLWRIGHT GARETH E GAVIN VINCENT |
| description | An application specific integrated circuit includes a multiplicity of operational blocks each of which includes at least one respective data bus and at least one respective visibility bus and a respective addressable multiplexer for selecting between those buses to provide an output on a to respective block bus. An interface block includes a first addressable multiplexer for selecting output data from a selected one of the blocks and providing an output; a register coupled to the output of the first addressable multiplexer; and a second addressable multiplexer for selecting between data provided by the output of the first addressable multiplexer and data in the register. Different portions of externally supplied address words are applied to the first addressable multiplexer and the respective addressable multiplexer, and a decoder is responsive to the address words for controlling the second addressable multiplexer. The arrangement provides a common multiplexing system for data buses and visibility buses. |
| format | Patent |
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An interface block includes a first addressable multiplexer for selecting output data from a selected one of the blocks and providing an output; a register coupled to the output of the first addressable multiplexer; and a second addressable multiplexer for selecting between data provided by the output of the first addressable multiplexer and data in the register. Different portions of externally supplied address words are applied to the first addressable multiplexer and the respective addressable multiplexer, and a decoder is responsive to the address words for controlling the second addressable multiplexer. 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An interface block includes a first addressable multiplexer for selecting output data from a selected one of the blocks and providing an output; a register coupled to the output of the first addressable multiplexer; and a second addressable multiplexer for selecting between data provided by the output of the first addressable multiplexer and data in the register. Different portions of externally supplied address words are applied to the first addressable multiplexer and the respective addressable multiplexer, and a decoder is responsive to the address words for controlling the second addressable multiplexer. The arrangement provides a common multiplexing system for data buses and visibility buses.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING |
| title | Application specific integrated circuit with dual-mode system for externally accessible data buses and visibility buses |
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