Method for making an electrical circuit board
A method 10 for making multi-layer electronic circuit boards having metallized apertures 34, 36 which may be selectively and electrically grounded or isolated from an electrical ground plane.
Gespeichert in:
| Hauptverfasser: | , , , , , , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | MCMILLAN RICHARD K KRAUTHEIM THOMAS B HOWEY MICHAEL A GLOVATSKY ANDREW Z PARUCHURI MOHAN R BELKE ROBERT E JAIRAZBHOY VIVEK A LI DELIN RAGHAVA RAM S GOENKA LAKHI N STRAUB MARC A |
| description | A method 10 for making multi-layer electronic circuit boards having metallized apertures 34, 36 which may be selectively and electrically grounded or isolated from an electrical ground plane. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6613239B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6613239B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6613239B23</originalsourceid><addsrcrecordid>eNrjZND1TS3JyE9RSMsvUshNzM7MS1dIzFNIzUlNLinKTE7MUUjOLEouzSxRSMpPLErhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocFmZobGRsaWTkbGRCgBAFUGKaM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method for making an electrical circuit board</title><source>esp@cenet</source><creator>MCMILLAN RICHARD K ; KRAUTHEIM THOMAS B ; HOWEY MICHAEL A ; GLOVATSKY ANDREW Z ; PARUCHURI MOHAN R ; BELKE ROBERT E ; JAIRAZBHOY VIVEK A ; LI DELIN ; RAGHAVA RAM S ; GOENKA LAKHI N ; STRAUB MARC A</creator><creatorcontrib>MCMILLAN RICHARD K ; KRAUTHEIM THOMAS B ; HOWEY MICHAEL A ; GLOVATSKY ANDREW Z ; PARUCHURI MOHAN R ; BELKE ROBERT E ; JAIRAZBHOY VIVEK A ; LI DELIN ; RAGHAVA RAM S ; GOENKA LAKHI N ; STRAUB MARC A</creatorcontrib><description>A method 10 for making multi-layer electronic circuit boards having metallized apertures 34, 36 which may be selectively and electrically grounded or isolated from an electrical ground plane.</description><edition>7</edition><language>eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC ; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION ; TECHNICAL SUBJECTS COVERED BY FORMER USPC ; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</subject><creationdate>2003</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20030902&DB=EPODOC&CC=US&NR=6613239B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25551,76302</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20030902&DB=EPODOC&CC=US&NR=6613239B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MCMILLAN RICHARD K</creatorcontrib><creatorcontrib>KRAUTHEIM THOMAS B</creatorcontrib><creatorcontrib>HOWEY MICHAEL A</creatorcontrib><creatorcontrib>GLOVATSKY ANDREW Z</creatorcontrib><creatorcontrib>PARUCHURI MOHAN R</creatorcontrib><creatorcontrib>BELKE ROBERT E</creatorcontrib><creatorcontrib>JAIRAZBHOY VIVEK A</creatorcontrib><creatorcontrib>LI DELIN</creatorcontrib><creatorcontrib>RAGHAVA RAM S</creatorcontrib><creatorcontrib>GOENKA LAKHI N</creatorcontrib><creatorcontrib>STRAUB MARC A</creatorcontrib><title>Method for making an electrical circuit board</title><description>A method 10 for making multi-layer electronic circuit boards having metallized apertures 34, 36 which may be selectively and electrically grounded or isolated from an electrical ground plane.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</subject><subject>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2003</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZND1TS3JyE9RSMsvUshNzM7MS1dIzFNIzUlNLinKTE7MUUjOLEouzSxRSMpPLErhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocFmZobGRsaWTkbGRCgBAFUGKaM</recordid><startdate>20030902</startdate><enddate>20030902</enddate><creator>MCMILLAN RICHARD K</creator><creator>KRAUTHEIM THOMAS B</creator><creator>HOWEY MICHAEL A</creator><creator>GLOVATSKY ANDREW Z</creator><creator>PARUCHURI MOHAN R</creator><creator>BELKE ROBERT E</creator><creator>JAIRAZBHOY VIVEK A</creator><creator>LI DELIN</creator><creator>RAGHAVA RAM S</creator><creator>GOENKA LAKHI N</creator><creator>STRAUB MARC A</creator><scope>EVB</scope></search><sort><creationdate>20030902</creationdate><title>Method for making an electrical circuit board</title><author>MCMILLAN RICHARD K ; KRAUTHEIM THOMAS B ; HOWEY MICHAEL A ; GLOVATSKY ANDREW Z ; PARUCHURI MOHAN R ; BELKE ROBERT E ; JAIRAZBHOY VIVEK A ; LI DELIN ; RAGHAVA RAM S ; GOENKA LAKHI N ; STRAUB MARC A</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6613239B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2003</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</topic><topic>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</topic><toplevel>online_resources</toplevel><creatorcontrib>MCMILLAN RICHARD K</creatorcontrib><creatorcontrib>KRAUTHEIM THOMAS B</creatorcontrib><creatorcontrib>HOWEY MICHAEL A</creatorcontrib><creatorcontrib>GLOVATSKY ANDREW Z</creatorcontrib><creatorcontrib>PARUCHURI MOHAN R</creatorcontrib><creatorcontrib>BELKE ROBERT E</creatorcontrib><creatorcontrib>JAIRAZBHOY VIVEK A</creatorcontrib><creatorcontrib>LI DELIN</creatorcontrib><creatorcontrib>RAGHAVA RAM S</creatorcontrib><creatorcontrib>GOENKA LAKHI N</creatorcontrib><creatorcontrib>STRAUB MARC A</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MCMILLAN RICHARD K</au><au>KRAUTHEIM THOMAS B</au><au>HOWEY MICHAEL A</au><au>GLOVATSKY ANDREW Z</au><au>PARUCHURI MOHAN R</au><au>BELKE ROBERT E</au><au>JAIRAZBHOY VIVEK A</au><au>LI DELIN</au><au>RAGHAVA RAM S</au><au>GOENKA LAKHI N</au><au>STRAUB MARC A</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for making an electrical circuit board</title><date>2003-09-02</date><risdate>2003</risdate><abstract>A method 10 for making multi-layer electronic circuit boards having metallized apertures 34, 36 which may be selectively and electrically grounded or isolated from an electrical ground plane.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US6613239B2 |
| source | esp@cenet |
| subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION TECHNICAL SUBJECTS COVERED BY FORMER USPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS |
| title | Method for making an electrical circuit board |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-15T23%3A59%3A24IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MCMILLAN%20RICHARD%20K&rft.date=2003-09-02&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6613239B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |