Semiconductor device having multiple thickness nickel silicide layers

A method of manufacturing a semiconductor device includes providing a gate electrode having first and second opposing sidewalls over a substrate having source/drain regions; forming first and second sidewall spacers respectively disposed adjacent the first and second sidewalls; and forming first and...

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Hauptverfasser:	WOO CHRISTY MEIU, XIANG QI, KLUTH GEORGE JONATHAN
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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creator	WOO CHRISTY MEIU XIANG QI KLUTH GEORGE JONATHAN
description	A method of manufacturing a semiconductor device includes providing a gate electrode having first and second opposing sidewalls over a substrate having source/drain regions; forming first and second sidewall spacers respectively disposed adjacent the first and second sidewalls; and forming first and second nickel silicide layer respectively disposed on the source/drain regions and the gate electrode. The nickel silicide layer over the gate electrode can be thicker than the nickel silicide layer over the source/drain regions. A semiconductor device formed from the method is also disclosed.
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fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6562717B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6562717B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6562717B13</originalsourceid><addsrcrecordid>eNqNyjEOgkAQRuFtLIx6h7mABRqh12Ds0ZpsZn9lwrBsmIXE22vhAazeV7y1qxsMwmMMM-dxooBFGNT5ReKLhlmzJAXlTriPMKP4BZRMVFgCSP0bk23d6unVsPt14-ha3y-3PdLYwpJnROT20ZSn8lAV1bk4_rF8AOufM7A</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device having multiple thickness nickel silicide layers</title><source>esp@cenet</source><creator>WOO CHRISTY MEIU ; XIANG QI ; KLUTH GEORGE JONATHAN</creator><creatorcontrib>WOO CHRISTY MEIU ; XIANG QI ; KLUTH GEORGE JONATHAN</creatorcontrib><description>A method of manufacturing a semiconductor device includes providing a gate electrode having first and second opposing sidewalls over a substrate having source/drain regions; forming first and second sidewall spacers respectively disposed adjacent the first and second sidewalls; and forming first and second nickel silicide layer respectively disposed on the source/drain regions and the gate electrode. The nickel silicide layer over the gate electrode can be thicker than the nickel silicide layer over the source/drain regions. A semiconductor device formed from the method is also disclosed.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2003</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20030513&DB=EPODOC&CC=US&NR=6562717B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20030513&DB=EPODOC&CC=US&NR=6562717B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WOO CHRISTY MEIU</creatorcontrib><creatorcontrib>XIANG QI</creatorcontrib><creatorcontrib>KLUTH GEORGE JONATHAN</creatorcontrib><title>Semiconductor device having multiple thickness nickel silicide layers</title><description>A method of manufacturing a semiconductor device includes providing a gate electrode having first and second opposing sidewalls over a substrate having source/drain regions; forming first and second sidewall spacers respectively disposed adjacent the first and second sidewalls; and forming first and second nickel silicide layer respectively disposed on the source/drain regions and the gate electrode. The nickel silicide layer over the gate electrode can be thicker than the nickel silicide layer over the source/drain regions. A semiconductor device formed from the method is also disclosed.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2003</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyjEOgkAQRuFtLIx6h7mABRqh12Ds0ZpsZn9lwrBsmIXE22vhAazeV7y1qxsMwmMMM-dxooBFGNT5ReKLhlmzJAXlTriPMKP4BZRMVFgCSP0bk23d6unVsPt14-ha3y-3PdLYwpJnROT20ZSn8lAV1bk4_rF8AOufM7A</recordid><startdate>20030513</startdate><enddate>20030513</enddate><creator>WOO CHRISTY MEIU</creator><creator>XIANG QI</creator><creator>KLUTH GEORGE JONATHAN</creator><scope>EVB</scope></search><sort><creationdate>20030513</creationdate><title>Semiconductor device having multiple thickness nickel silicide layers</title><author>WOO CHRISTY MEIU ; XIANG QI ; KLUTH GEORGE JONATHAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6562717B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2003</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>WOO CHRISTY MEIU</creatorcontrib><creatorcontrib>XIANG QI</creatorcontrib><creatorcontrib>KLUTH GEORGE JONATHAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WOO CHRISTY MEIU</au><au>XIANG QI</au><au>KLUTH GEORGE JONATHAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device having multiple thickness nickel silicide layers</title><date>2003-05-13</date><risdate>2003</risdate><abstract>A method of manufacturing a semiconductor device includes providing a gate electrode having first and second opposing sidewalls over a substrate having source/drain regions; forming first and second sidewall spacers respectively disposed adjacent the first and second sidewalls; and forming first and second nickel silicide layer respectively disposed on the source/drain regions and the gate electrode. The nickel silicide layer over the gate electrode can be thicker than the nickel silicide layer over the source/drain regions. A semiconductor device formed from the method is also disclosed.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
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subjects	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
title	Semiconductor device having multiple thickness nickel silicide layers
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-04T20%3A37%3A01IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=WOO%20CHRISTY%20MEIU&rft.date=2003-05-13&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6562717B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true