Programmable latch that avoids a non-desired output state

A circuit and method are provided for ensuring a non-desired output state of a latch or flip-flop cannot be produced. The latch can be configured as a set dominant, reset dominant, or memory dominant circuit by simply placing programmed voltage values on select transistors of the latch. The programm...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MEYERS STEVEN C, LITTLE TERRY D
Format: Patent
Sprache:eng
Schlagworte:
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